ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

tcg-mips: Use J and JAL opcodes 

For userland builds calls will normally be in range,
and for the exit_tb opcode the branch to the epilogue.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2014-03-23 16:57:18 +00:00
parent 483c76e140
commit f8c9eddb2b
1 changed files with 40 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
tcg/mips/tcg-target.c
View File

@ -222,6 +222,8 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
/* instruction opcodes */ /* instruction opcodes */
enum { enum {
OPC_J = 0x02 << 26,
OPC_JAL = 0x03 << 26,
OPC_BEQ = 0x04 << 26, OPC_BEQ = 0x04 << 26,
OPC_BNE = 0x05 << 26, OPC_BNE = 0x05 << 26,
OPC_BLEZ = 0x06 << 26, OPC_BLEZ = 0x06 << 26,
@ -345,6 +347,29 @@ static inline void tcg_out_opc_sa(TCGContext *s, int opc,
} }
/*
* Type jump.
* Returns true if the branch was in range and the insn was emitted.
*/
static bool tcg_out_opc_jmp(TCGContext *s, int opc, void *target)
{
uintptr_t dest = (uintptr_t)target;
uintptr_t from = (uintptr_t)s->code_ptr + 4;
int32_t inst;
/* The pc-region branch happens within the 256MB region of
the delay slot (thus the +4). */
if ((from ^ dest) & -(1 << 28)) {
return false;
}
assert((dest & 3) == 0);
inst = opc;
inst |= (dest >> 2) & 0x3ffffff;
tcg_out32(s, inst);
return true;
}
static inline void tcg_out_nop(TCGContext *s) static inline void tcg_out_nop(TCGContext *s)
{ {
tcg_out32(s, 0); tcg_out32(s, 0);
@ -1247,10 +1272,17 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
#endif #endif
} }
static void tcg_out_call(TCGContext *s, tcg_insn_unit *target) static void tcg_out_call(TCGContext *s, tcg_insn_unit *arg)
{ {
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T9, (intptr_t)target); /* Note that the ABI requires the called function's address to be
tcg_out_opc_reg(s, OPC_JALR, TCG_REG_RA, TCG_REG_T9, 0); loaded into T9, even if a direct branch is in range. */
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T9, (uintptr_t)arg);
/* But do try a direct branch, allowing the cpu better insn prefetch. */
if (!tcg_out_opc_jmp(s, OPC_JAL, arg)) {
tcg_out_opc_reg(s, OPC_JALR, TCG_REG_RA, TCG_REG_T9, 0);
}
tcg_out_nop(s); tcg_out_nop(s);
} }
@ -1259,9 +1291,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
{ {
switch(opc) { switch(opc) {
case INDEX_op_exit_tb: case INDEX_op_exit_tb:
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_V0, args[0]); tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_V0, args[0]);
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_AT, (uintptr_t)tb_ret_addr); if (!tcg_out_opc_jmp(s, OPC_J, tb_ret_addr)) {
tcg_out_opc_reg(s, OPC_JR, 0, TCG_REG_AT, 0); tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_AT, (uintptr_t)tb_ret_addr);
tcg_out_opc_reg(s, OPC_JR, 0, TCG_REG_AT, 0);
}
tcg_out_nop(s); tcg_out_nop(s);
break; break;
case INDEX_op_goto_tb: case INDEX_op_goto_tb: