diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 0c8e017f71..2a78cd639b 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1010,6 +1010,7 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type)
     cs->exception_index = RISCV_EXCP_NONE;
     env->load_res = -1;
     set_default_nan_mode(1, &env->fp_status);
+    env->vill = true;
 
 #ifndef CONFIG_USER_ONLY
     if (cpu->cfg.debug) {