mirror of https://github.com/xemu-project/xemu.git
target/i386/hvf: Use CPUState typedef
QEMU coding style recommend using structure typedefs: https://www.qemu.org/docs/master/devel/style.html#typedefs Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240129164514.73104-14-philmd@linaro.org> [thuth: Break long lines to avoid checkpatch.pl errors] Signed-off-by: Thomas Huth <thuth@redhat.com>
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@ -46,7 +46,7 @@
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return ar;
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}*/
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bool x86_read_segment_descriptor(struct CPUState *cpu,
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bool x86_read_segment_descriptor(CPUState *cpu,
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struct x86_segment_descriptor *desc,
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x68_segment_selector sel)
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{
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@ -76,7 +76,7 @@ bool x86_read_segment_descriptor(struct CPUState *cpu,
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return true;
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}
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bool x86_write_segment_descriptor(struct CPUState *cpu,
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bool x86_write_segment_descriptor(CPUState *cpu,
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struct x86_segment_descriptor *desc,
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x68_segment_selector sel)
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{
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@ -99,7 +99,7 @@ bool x86_write_segment_descriptor(struct CPUState *cpu,
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return true;
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}
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bool x86_read_call_gate(struct CPUState *cpu, struct x86_call_gate *idt_desc,
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bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc,
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int gate)
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{
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target_ulong base = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_BASE);
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@ -115,30 +115,30 @@ bool x86_read_call_gate(struct CPUState *cpu, struct x86_call_gate *idt_desc,
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return true;
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}
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bool x86_is_protected(struct CPUState *cpu)
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bool x86_is_protected(CPUState *cpu)
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{
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uint64_t cr0 = rvmcs(cpu->accel->fd, VMCS_GUEST_CR0);
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return cr0 & CR0_PE_MASK;
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}
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bool x86_is_real(struct CPUState *cpu)
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bool x86_is_real(CPUState *cpu)
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{
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return !x86_is_protected(cpu);
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}
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bool x86_is_v8086(struct CPUState *cpu)
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bool x86_is_v8086(CPUState *cpu)
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{
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X86CPU *x86_cpu = X86_CPU(cpu);
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CPUX86State *env = &x86_cpu->env;
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return x86_is_protected(cpu) && (env->eflags & VM_MASK);
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}
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bool x86_is_long_mode(struct CPUState *cpu)
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bool x86_is_long_mode(CPUState *cpu)
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{
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return rvmcs(cpu->accel->fd, VMCS_GUEST_IA32_EFER) & MSR_EFER_LMA;
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}
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bool x86_is_long64_mode(struct CPUState *cpu)
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bool x86_is_long64_mode(CPUState *cpu)
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{
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struct vmx_segment desc;
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vmx_read_segment_descriptor(cpu, &desc, R_CS);
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@ -146,24 +146,24 @@ bool x86_is_long64_mode(struct CPUState *cpu)
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return x86_is_long_mode(cpu) && ((desc.ar >> 13) & 1);
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}
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bool x86_is_paging_mode(struct CPUState *cpu)
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bool x86_is_paging_mode(CPUState *cpu)
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{
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uint64_t cr0 = rvmcs(cpu->accel->fd, VMCS_GUEST_CR0);
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return cr0 & CR0_PG_MASK;
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}
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bool x86_is_pae_enabled(struct CPUState *cpu)
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bool x86_is_pae_enabled(CPUState *cpu)
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{
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uint64_t cr4 = rvmcs(cpu->accel->fd, VMCS_GUEST_CR4);
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return cr4 & CR4_PAE_MASK;
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}
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target_ulong linear_addr(struct CPUState *cpu, target_ulong addr, X86Seg seg)
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target_ulong linear_addr(CPUState *cpu, target_ulong addr, X86Seg seg)
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{
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return vmx_read_segment_base(cpu, seg) + addr;
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}
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target_ulong linear_addr_size(struct CPUState *cpu, target_ulong addr, int size,
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target_ulong linear_addr_size(CPUState *cpu, target_ulong addr, int size,
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X86Seg seg)
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{
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switch (size) {
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@ -179,7 +179,7 @@ target_ulong linear_addr_size(struct CPUState *cpu, target_ulong addr, int size,
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return linear_addr(cpu, addr, seg);
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}
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target_ulong linear_rip(struct CPUState *cpu, target_ulong rip)
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target_ulong linear_rip(CPUState *cpu, target_ulong rip)
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{
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return linear_addr(cpu, rip, R_CS);
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}
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@ -248,30 +248,30 @@ typedef struct x68_segment_selector {
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#define BH(cpu) RH(cpu, R_EBX)
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/* deal with GDT/LDT descriptors in memory */
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bool x86_read_segment_descriptor(struct CPUState *cpu,
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bool x86_read_segment_descriptor(CPUState *cpu,
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struct x86_segment_descriptor *desc,
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x68_segment_selector sel);
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bool x86_write_segment_descriptor(struct CPUState *cpu,
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bool x86_write_segment_descriptor(CPUState *cpu,
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struct x86_segment_descriptor *desc,
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x68_segment_selector sel);
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bool x86_read_call_gate(struct CPUState *cpu, struct x86_call_gate *idt_desc,
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bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc,
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int gate);
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/* helpers */
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bool x86_is_protected(struct CPUState *cpu);
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bool x86_is_real(struct CPUState *cpu);
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bool x86_is_v8086(struct CPUState *cpu);
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bool x86_is_long_mode(struct CPUState *cpu);
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bool x86_is_long64_mode(struct CPUState *cpu);
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bool x86_is_paging_mode(struct CPUState *cpu);
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bool x86_is_pae_enabled(struct CPUState *cpu);
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bool x86_is_protected(CPUState *cpu);
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bool x86_is_real(CPUState *cpu);
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bool x86_is_v8086(CPUState *cpu);
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bool x86_is_long_mode(CPUState *cpu);
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bool x86_is_long64_mode(CPUState *cpu);
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bool x86_is_paging_mode(CPUState *cpu);
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bool x86_is_pae_enabled(CPUState *cpu);
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enum X86Seg;
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target_ulong linear_addr(struct CPUState *cpu, target_ulong addr, enum X86Seg seg);
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target_ulong linear_addr_size(struct CPUState *cpu, target_ulong addr, int size,
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target_ulong linear_addr(CPUState *cpu, target_ulong addr, enum X86Seg seg);
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target_ulong linear_addr_size(CPUState *cpu, target_ulong addr, int size,
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enum X86Seg seg);
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target_ulong linear_rip(struct CPUState *cpu, target_ulong rip);
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target_ulong linear_rip(CPUState *cpu, target_ulong rip);
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static inline uint64_t rdtscp(void)
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{
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@ -67,12 +67,12 @@ x68_segment_selector vmx_read_segment_selector(CPUState *cpu, X86Seg seg)
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return sel;
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}
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void vmx_write_segment_selector(struct CPUState *cpu, x68_segment_selector selector, X86Seg seg)
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void vmx_write_segment_selector(CPUState *cpu, x68_segment_selector selector, X86Seg seg)
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{
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wvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector, selector.sel);
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}
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void vmx_read_segment_descriptor(struct CPUState *cpu, struct vmx_segment *desc, X86Seg seg)
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void vmx_read_segment_descriptor(CPUState *cpu, struct vmx_segment *desc, X86Seg seg)
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{
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desc->sel = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector);
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desc->base = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base);
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wvmcs(cpu->accel->fd, sf->ar_bytes, desc->ar);
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}
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void x86_segment_descriptor_to_vmx(struct CPUState *cpu, x68_segment_selector selector, struct x86_segment_descriptor *desc, struct vmx_segment *vmx_desc)
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void x86_segment_descriptor_to_vmx(CPUState *cpu, x68_segment_selector selector,
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struct x86_segment_descriptor *desc,
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struct vmx_segment *vmx_desc)
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{
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vmx_desc->sel = selector.sel;
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vmx_desc->base = x86_segment_base(desc);
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desc->type;
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}
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void vmx_segment_to_x86_descriptor(struct CPUState *cpu, struct vmx_segment *vmx_desc, struct x86_segment_descriptor *desc)
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void vmx_segment_to_x86_descriptor(CPUState *cpu, struct vmx_segment *vmx_desc,
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struct x86_segment_descriptor *desc)
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{
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x86_set_segment_limit(desc, vmx_desc->limit);
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x86_set_segment_base(desc, vmx_desc->base);
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} vmx_segment;
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/* deal with vmstate descriptors */
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void vmx_read_segment_descriptor(struct CPUState *cpu,
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void vmx_read_segment_descriptor(CPUState *cpu,
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struct vmx_segment *desc, enum X86Seg seg);
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void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc,
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enum X86Seg seg);
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x68_segment_selector vmx_read_segment_selector(struct CPUState *cpu,
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x68_segment_selector vmx_read_segment_selector(CPUState *cpu,
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enum X86Seg seg);
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void vmx_write_segment_selector(struct CPUState *cpu,
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void vmx_write_segment_selector(CPUState *cpu,
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x68_segment_selector selector,
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enum X86Seg seg);
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uint64_t vmx_read_segment_base(struct CPUState *cpu, enum X86Seg seg);
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void vmx_write_segment_base(struct CPUState *cpu, enum X86Seg seg,
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uint64_t vmx_read_segment_base(CPUState *cpu, enum X86Seg seg);
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void vmx_write_segment_base(CPUState *cpu, enum X86Seg seg,
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uint64_t base);
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void x86_segment_descriptor_to_vmx(struct CPUState *cpu,
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void x86_segment_descriptor_to_vmx(CPUState *cpu,
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x68_segment_selector selector,
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struct x86_segment_descriptor *desc,
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struct vmx_segment *vmx_desc);
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uint32_t vmx_read_segment_limit(CPUState *cpu, enum X86Seg seg);
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uint32_t vmx_read_segment_ar(CPUState *cpu, enum X86Seg seg);
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void vmx_segment_to_x86_descriptor(struct CPUState *cpu,
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void vmx_segment_to_x86_descriptor(CPUState *cpu,
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struct vmx_segment *vmx_desc,
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struct x86_segment_descriptor *desc);
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void init_emu(void);
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bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
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void load_regs(struct CPUState *cpu);
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void store_regs(struct CPUState *cpu);
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void load_regs(CPUState *cpu);
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void store_regs(CPUState *cpu);
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void simulate_rdmsr(CPUX86State *env);
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void simulate_wrmsr(CPUX86State *env);
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bool exec_access;
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};
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static int gpt_top_level(struct CPUState *cpu, bool pae)
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static int gpt_top_level(CPUState *cpu, bool pae)
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{
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if (!pae) {
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return 2;
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}
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static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt,
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static bool get_pt_entry(CPUState *cpu, struct gpt_translation *pt,
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int level, bool pae)
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{
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int index;
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}
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/* test page table entry */
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static bool test_pt_entry(struct CPUState *cpu, struct gpt_translation *pt,
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static bool test_pt_entry(CPUState *cpu, struct gpt_translation *pt,
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int level, bool *is_large, bool pae)
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{
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uint64_t pte = pt->pte[level];
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static bool walk_gpt(struct CPUState *cpu, target_ulong addr, int err_code,
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static bool walk_gpt(CPUState *cpu, target_ulong addr, int err_code,
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struct gpt_translation *pt, bool pae)
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{
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int top_level, level;
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}
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bool mmu_gva_to_gpa(struct CPUState *cpu, target_ulong gva, uint64_t *gpa)
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bool mmu_gva_to_gpa(CPUState *cpu, target_ulong gva, uint64_t *gpa)
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{
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bool res;
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struct gpt_translation pt;
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return false;
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}
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void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes)
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void vmx_write_mem(CPUState *cpu, target_ulong gva, void *data, int bytes)
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{
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uint64_t gpa;
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}
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}
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void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes)
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void vmx_read_mem(CPUState *cpu, void *data, target_ulong gva, int bytes)
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{
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uint64_t gpa;
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@ -36,9 +36,9 @@
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#define MMU_PAGE_US (1 << 2)
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#define MMU_PAGE_NX (1 << 3)
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bool mmu_gva_to_gpa(struct CPUState *cpu, target_ulong gva, uint64_t *gpa);
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bool mmu_gva_to_gpa(CPUState *cpu, target_ulong gva, uint64_t *gpa);
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void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes);
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void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes);
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void vmx_write_mem(CPUState *cpu, target_ulong gva, void *data, int bytes);
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void vmx_read_mem(CPUState *cpu, void *data, target_ulong gva, int bytes);
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#endif /* X86_MMU_H */
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