mirror of https://github.com/xemu-project/xemu.git
hw/arm: add cache controller for Freescale i.MX6
Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231219105510.4907-1-n.ostrenkov@gmail.com [PMM: fixed stray whitespace] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
9468484fe9
commit
f7f5784af1
|
@ -537,6 +537,7 @@ config FSL_IMX6
|
|||
select IMX_I2C
|
||||
select IMX_USBPHY
|
||||
select WDT_IMX2
|
||||
select PL310 # cache controller
|
||||
select SDHCI
|
||||
|
||||
config ASPEED_SOC
|
||||
|
|
|
@ -154,6 +154,9 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
|
|||
qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_FIQ));
|
||||
}
|
||||
|
||||
/* L2 cache controller */
|
||||
sysbus_create_simple("l2x0", FSL_IMX6_PL310_ADDR, NULL);
|
||||
|
||||
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ccm), errp)) {
|
||||
return;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue