From f62bd897e64c6fb1f93e8795e835980516fe53b5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Llu=C3=ADs=20Vilanova?= Date: Fri, 14 Jul 2017 12:18:09 +0300 Subject: [PATCH] target/arm: [tcg] Port to insn_start MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova Reviewed-by: Richard Henderson Reviewed-by: Alex Benneé Message-Id: <150002388959.22386.12439646324427589940.stgit@frigg.lan> Signed-off-by: Richard Henderson --- target/arm/translate.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 3138a23e0c..005157225c 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -11936,6 +11936,16 @@ static void arm_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) } } +static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + dc->insn_start_idx = tcg_op_buf_count(); + tcg_gen_insn_start(dc->pc, + (dc->condexec_cond << 4) | (dc->condexec_mask >> 1), + 0); +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) { @@ -11979,10 +11989,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) do { dc->base.num_insns++; - dc->insn_start_idx = tcg_op_buf_count(); - tcg_gen_insn_start(dc->pc, - (dc->condexec_cond << 4) | (dc->condexec_mask >> 1), - 0); + arm_tr_insn_start(&dc->base, cs); if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { CPUBreakpoint *bp;