mirror of https://github.com/xemu-project/xemu.git
ESCC: swap the two CharDriverState arguments
Swap the two CharDriverState arguments so that the first argument corresponds to the channel A and the second argument to the channel B. Modify hw/sun4m.c accordingly. This fixes the order of the serial ports on the PPC machines. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6284 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -719,8 +719,8 @@ static int escc_load(QEMUFile *f, void *opaque, int version_id)
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}
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int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1,
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CharDriverState *chr2, int clock, int it_shift)
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int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
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CharDriverState *chrB, int clock, int it_shift)
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{
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int escc_io_memory, i;
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SerialState *s;
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@ -737,8 +737,8 @@ int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1,
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escc_io_memory);
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s->it_shift = it_shift;
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s->chn[0].chr = chr1;
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s->chn[1].chr = chr2;
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s->chn[0].chr = chrB;
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s->chn[1].chr = chrA;
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s->chn[0].disabled = 0;
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s->chn[1].disabled = 0;
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@ -1,7 +1,7 @@
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/* escc.c */
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#define ESCC_SIZE 4
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int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1,
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CharDriverState *chr2, int clock, int it_shift);
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int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
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CharDriverState *chrB, int clock, int it_shift);
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void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq,
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int disabled, int clock, int it_shift);
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@ -1564,8 +1564,8 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
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nographic, ESCC_CLOCK, 1);
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// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
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// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
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escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[1],
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serial_hds[0], ESCC_CLOCK, 1);
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escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[0],
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serial_hds[1], ESCC_CLOCK, 1);
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slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0,
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slavio_irq[hwdef->me_irq], NULL, &fdc_tc);
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