mirror of https://github.com/xemu-project/xemu.git
tcg: fix --disable-tcg build breakage
Fix the --disable-tcg breakage introduced by tb_lock's removal by relying on the fact that tcg_enabled() is set to 0 at compile-time under --disable-tcg. While at it, add further asserts to fix builds that enable both --disable-tcg and --enable-debug, which were broken even before tb_lock's removal. Tested to build x86_64-softmmu and i386-softmmu targets. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -21,10 +21,6 @@ void tb_flush(CPUState *cpu)
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{
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}
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void tb_unlock(void)
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{
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}
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void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
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{
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}
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4
cpus.c
4
cpus.c
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@ -1355,6 +1355,7 @@ static int tcg_cpu_exec(CPUState *cpu)
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int64_t ti;
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#endif
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assert(tcg_enabled());
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#ifdef CONFIG_PROFILER
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ti = profile_getclock();
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#endif
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@ -1397,6 +1398,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg)
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{
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CPUState *cpu = arg;
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assert(tcg_enabled());
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rcu_register_thread();
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tcg_register_thread();
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@ -1631,6 +1633,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
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{
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CPUState *cpu = arg;
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assert(tcg_enabled());
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g_assert(!use_icount);
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rcu_register_thread();
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@ -1854,6 +1857,7 @@ static void qemu_tcg_init_vcpu(CPUState *cpu)
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static QemuThread *single_tcg_cpu_thread;
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static int tcg_region_inited;
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assert(tcg_enabled());
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/*
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* Initialize TCG regions--once. Now is a good time, because:
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* (1) TCG's init context, prologue and target globals have been set up.
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3
exec.c
3
exec.c
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@ -1323,6 +1323,7 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
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RAMBlock *block;
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ram_addr_t end;
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assert(tcg_enabled());
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end = TARGET_PAGE_ALIGN(start + length);
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start &= TARGET_PAGE_MASK;
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@ -2655,6 +2656,7 @@ void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
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void memory_notdirty_write_complete(NotDirtyInfo *ndi)
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{
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if (ndi->pages) {
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assert(tcg_enabled());
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page_collection_unlock(ndi->pages);
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ndi->pages = NULL;
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}
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@ -3046,6 +3048,7 @@ static void tcg_commit(MemoryListener *listener)
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CPUAddressSpace *cpuas;
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AddressSpaceDispatch *d;
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assert(tcg_enabled());
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/* since each CPU stores ram addresses in its TLB cache, we must
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reset the modified entries */
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cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
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