Compile usb-ohci only once

Push TARGET_WORDS_BIGENDIAN dependency to board level.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

Makefile.objs

@@ -143,6 +143,7 @@ hw-obj-$(CONFIG_PARALLEL) += parallel.o
 hw-obj-$(CONFIG_I8254) += i8254.o
 hw-obj-$(CONFIG_PCSPK) += pcspk.o
 hw-obj-$(CONFIG_USB_UHCI) += usb-uhci.o
+hw-obj-$(CONFIG_USB_OHCI) += usb-ohci.o
 hw-obj-$(CONFIG_FDC) += fdc.o
 
 # PCI watchdog devices

Makefile.target

@@ -186,9 +186,6 @@ QEMU_CFLAGS += $(VNC_SASL_CFLAGS)
 # xen backend driver support
 obj-$(CONFIG_XEN) += xen_machine_pv.o xen_domainbuild.o
 
-# USB layer
-obj-$(CONFIG_USB_OHCI) += usb-ohci.o
-
 # PCI network cards
 obj-y += rtl8139.o
 obj-y += e1000.o

hw/devices.h

@@ -69,5 +69,5 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
 
 /* usb-ohci.c */
 void usb_ohci_init_sm501(uint32_t mmio_base, uint32_t localmem_base,
-                         int num_ports, int devfn, qemu_irq irq);
+                         int num_ports, int devfn, qemu_irq irq, int be);
 #endif

hw/ppc_newworld.c

@@ -387,7 +387,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
                escc_mem_index);
 
     if (usb_enabled) {
-        usb_ohci_init_pci(pci_bus, -1);
+        usb_ohci_init_pci(pci_bus, -1, 1);
     }
 
     /* U3 needs to use USB for input because Linux doesn't support via-cuda

hw/ppc_oldworld.c

@@ -370,7 +370,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
                escc_mem_index);
 
     if (usb_enabled) {
-        usb_ohci_init_pci(pci_bus, -1);
+        usb_ohci_init_pci(pci_bus, -1, 1);
     }
 
     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)

hw/ppc_prep.c

@@ -750,7 +750,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
 #endif
 
     if (usb_enabled) {
-        usb_ohci_init_pci(pci_bus, -1);
+        usb_ohci_init_pci(pci_bus, -1, 1);
     }
 
     m48t59 = m48t59_init(i8259[8], 0, 0x0074, NVRAM_SIZE, 59);

hw/pxa.h

@@ -213,8 +213,4 @@ struct PXA2xxI2SState {
 PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision);
 PXA2xxState *pxa255_init(unsigned int sdram_size);
 
-/* usb-ohci.c */
-void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
-                       qemu_irq irq);
-
 #endif	/* PXA_H */

hw/pxa2xx.c

@@ -9,6 +9,7 @@
 
 #include "sysbus.h"
 #include "pxa.h"
+#include "usb-ohci.h"
 #include "sysemu.h"
 #include "pc.h"
 #include "i2c.h"
@@ -2128,7 +2129,11 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
     }
 
     if (usb_enabled) {
-        usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1]);
+#ifdef TARGET_WORDS_BIGENDIAN
+        usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 1);
+#else
+        usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 0);
+#endif
     }
 
     s->pcmcia[0] = pxa2xx_pcmcia_init(0x20000000);
@@ -2247,7 +2252,11 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
     }
 
     if (usb_enabled) {
-        usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1]);
+#ifdef TARGET_WORDS_BIGENDIAN
+        usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 1);
+#else
+        usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 0);
+#endif
     }
 
     s->pcmcia[0] = pxa2xx_pcmcia_init(0x20000000);

hw/realview.c

@@ -266,7 +266,11 @@ static void realview_init(ram_addr_t ram_size,
                                     pic[48], pic[49], pic[50], pic[51], NULL);
         pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
         if (usb_enabled) {
-            usb_ohci_init_pci(pci_bus, -1);
+#ifdef TARGET_WORDS_BIGENDIAN
+            usb_ohci_init_pci(pci_bus, -1, 1);
+#else
+            usb_ohci_init_pci(pci_bus, -1, 0);
+#endif
         }
         n = drive_get_max_bus(IF_SCSI);
         while (n >= 0) {

hw/sm501.c

@@ -1222,8 +1222,13 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
                                  0x1000, sm501_disp_ctrl_index);
 
     /* bridge to usb host emulation module */
+#ifdef TARGET_WORDS_BIGENDIAN
     usb_ohci_init_sm501(base + MMIO_BASE_OFFSET + SM501_USB_HOST, base,
-                        2, -1, irq);
+                        2, -1, irq, 1);
+#else
+    usb_ohci_init_sm501(base + MMIO_BASE_OFFSET + SM501_USB_HOST, base,
+                        2, -1, irq, 0);
+#endif
 
     /* bridge to serial emulation module */
     if (chr) {

hw/usb-ohci.c

@@ -30,7 +30,6 @@
 #include "qemu-timer.h"
 #include "usb.h"
 #include "pci.h"
-#include "pxa.h"
 #include "devices.h"
 #include "usb-ohci.h"
 
@@ -1399,7 +1398,7 @@ static void ohci_port_set_status(OHCIState *ohci, int portnum, uint32_t val)
     return;
 }
 
-static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr)
+static uint32_t ohci_mem_read_le(void *ptr, target_phys_addr_t addr)
 {
     OHCIState *ohci = ptr;
     uint32_t retval;
@@ -1516,21 +1515,22 @@ static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr)
             retval = 0xffffffff;
         }
     }
-
-#ifdef TARGET_WORDS_BIGENDIAN
-    retval = bswap32(retval);
-#endif
     return retval;
 }
 
-static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val)
+static uint32_t ohci_mem_read_be(void *ptr, target_phys_addr_t addr)
+{
+    uint32_t retval;
+
+    retval = ohci_mem_read_le(ptr, addr);
+    retval = bswap32(retval);
+    return retval;
+}
+
+static void ohci_mem_write_le(void *ptr, target_phys_addr_t addr, uint32_t val)
 {
     OHCIState *ohci = ptr;
 
-#ifdef TARGET_WORDS_BIGENDIAN
-    val = bswap32(val);
-#endif
-
     /* Only aligned reads are allowed on OHCI */
     if (addr & 3) {
         fprintf(stderr, "usb-ohci: Mis-aligned write\n");
@@ -1647,24 +1647,43 @@ static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val)
     }
 }
 
+static void ohci_mem_write_be(void *ptr, target_phys_addr_t addr, uint32_t val)
+{
+    val = bswap32(val);
+    ohci_mem_write_le(ptr, addr, val);
+}
+
 /* Only dword reads are defined on OHCI register space */
-static CPUReadMemoryFunc * const ohci_readfn[3]={
+static CPUReadMemoryFunc * const ohci_readfn_be[3]={
-    ohci_mem_read,
+    ohci_mem_read_be,
-    ohci_mem_read,
+    ohci_mem_read_be,
-    ohci_mem_read
+    ohci_mem_read_be
 };
 
 /* Only dword writes are defined on OHCI register space */
-static CPUWriteMemoryFunc * const ohci_writefn[3]={
+static CPUWriteMemoryFunc * const ohci_writefn_be[3]={
-    ohci_mem_write,
+    ohci_mem_write_be,
-    ohci_mem_write,
+    ohci_mem_write_be,
-    ohci_mem_write
+    ohci_mem_write_be
+};
+
+static CPUReadMemoryFunc * const ohci_readfn_le[3]={
+    ohci_mem_read_le,
+    ohci_mem_read_le,
+    ohci_mem_read_le
+};
+
+static CPUWriteMemoryFunc * const ohci_writefn_le[3]={
+    ohci_mem_write_le,
+    ohci_mem_write_le,
+    ohci_mem_write_le
 };
 
 static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
                           int num_ports, int devfn,
                           qemu_irq irq, enum ohci_type type,
-                          const char *name, uint32_t localmem_base)
+                          const char *name, uint32_t localmem_base,
+                          int be)
 {
     int i;
 
@@ -1684,7 +1703,13 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
                 usb_frame_time, usb_bit_time);
     }
 
-    ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci);
+    if (be) {
+        ohci->mem = cpu_register_io_memory(ohci_readfn_be, ohci_writefn_be,
+                                           ohci);
+    } else {
+        ohci->mem = cpu_register_io_memory(ohci_readfn_le, ohci_writefn_le,
+                                           ohci);
+    }
     ohci->localmem_base = localmem_base;
     ohci->name = name;
 
@@ -1704,6 +1729,7 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
 typedef struct {
     PCIDevice pci_dev;
     OHCIState state;
+    uint32_t be;
 } OHCIPCIState;
 
 static void ohci_mapfunc(PCIDevice *pci_dev, int i,
@@ -1728,7 +1754,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
 
     usb_ohci_init(&ohci->state, &dev->qdev, num_ports,
                   ohci->pci_dev.devfn, ohci->pci_dev.irq[0],
-                  OHCI_TYPE_PCI, ohci->pci_dev.name, 0);
+                  OHCI_TYPE_PCI, ohci->pci_dev.name, 0, ohci->be);
 
     /* TODO: avoid cast below by using dev */
     pci_register_bar((struct PCIDevice *)ohci, 0, 256,
@@ -1736,29 +1762,33 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
     return 0;
 }
 
-void usb_ohci_init_pci(struct PCIBus *bus, int devfn)
+void usb_ohci_init_pci(struct PCIBus *bus, int devfn, int be)
 {
-    pci_create_simple(bus, devfn, "pci-ohci");
+    PCIDevice *dev;
+
+    dev = pci_create(bus, devfn, "pci-ohci");
+    qdev_prop_set_uint32(&dev->qdev, "be", be);
+    qdev_init_nofail(&dev->qdev);
 }
 
 void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
-                       qemu_irq irq)
+                       qemu_irq irq, int be)
 {
     OHCIState *ohci = (OHCIState *)qemu_mallocz(sizeof(OHCIState));
 
     usb_ohci_init(ohci, NULL /* FIXME */, num_ports, devfn, irq,
-                  OHCI_TYPE_PXA, "OHCI USB", 0);
+                  OHCI_TYPE_PXA, "OHCI USB", 0, be);
 
     cpu_register_physical_memory(base, 0x1000, ohci->mem);
 }
 
 void usb_ohci_init_sm501(uint32_t mmio_base, uint32_t localmem_base,
-                         int num_ports, int devfn, qemu_irq irq)
+                         int num_ports, int devfn, qemu_irq irq, int be)
 {
     OHCIState *ohci = (OHCIState *)qemu_mallocz(sizeof(OHCIState));
 
     usb_ohci_init(ohci, NULL /* FIXME */, num_ports, devfn, irq,
-                  OHCI_TYPE_SM501, "OHCI USB", localmem_base);
+                  OHCI_TYPE_SM501, "OHCI USB", localmem_base, be);
 
     cpu_register_physical_memory(mmio_base, 0x1000, ohci->mem);
 }
@@ -1768,6 +1798,10 @@ static PCIDeviceInfo ohci_info = {
     .qdev.desc    = "Apple USB Controller",
     .qdev.size    = sizeof(OHCIPCIState),
     .init         = usb_ohci_initfn_pci,
+    .qdev.props   = (Property[]) {
+        DEFINE_PROP_HEX32("be", OHCIPCIState, be, 0),
+        DEFINE_PROP_END_OF_LIST(),
+    }
 };
 
 static void ohci_register(void)

hw/usb-ohci.h

@@ -3,7 +3,8 @@
 
 #include "qemu-common.h"
 
-void usb_ohci_init_pci(struct PCIBus *bus, int devfn);
+void usb_ohci_init_pci(struct PCIBus *bus, int devfn, int be);
-
+void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
+                       qemu_irq irq, int be);
 #endif
 

hw/versatilepb.c

@@ -218,7 +218,11 @@ static void versatile_init(ram_addr_t ram_size,
         }
     }
     if (usb_enabled) {
-        usb_ohci_init_pci(pci_bus, -1);
+#ifdef TARGET_WORDS_BIGENDIAN
+        usb_ohci_init_pci(pci_bus, -1, 1);
+#else
+        usb_ohci_init_pci(pci_bus, -1, 0);
+#endif
     }
     n = drive_get_max_bus(IF_SCSI);
     while (n >= 0) {