mirror of https://github.com/xemu-project/xemu.git
hw/display: Constify VMState
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-27-richard.henderson@linaro.org>
This commit is contained in:
parent
2f6cab053f
commit
f0613160d2
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@ -1435,7 +1435,7 @@ static const VMStateDescription vmstate_artist = {
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.version_id = 2,
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.minimum_version_id = 2,
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.post_load = vmstate_artist_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT16(height, ARTISTState),
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VMSTATE_UINT16(width, ARTISTState),
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VMSTATE_UINT16(depth, ARTISTState),
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@ -355,7 +355,7 @@ static const VMStateDescription vmstate_bcm2835_fb = {
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.name = TYPE_BCM2835_FB,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_BOOL(lock, BCM2835FBState),
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VMSTATE_BOOL(invalidate, BCM2835FBState),
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VMSTATE_BOOL(pending, BCM2835FBState),
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@ -61,7 +61,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(BochsDisplayState, BOCHS_DISPLAY)
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static const VMStateDescription vmstate_bochs_display = {
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.name = "bochs-display",
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_PCI_DEVICE(pci, BochsDisplayState),
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VMSTATE_UINT16_ARRAY(vbe_regs, BochsDisplayState, VBE_DISPI_INDEX_NB),
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VMSTATE_BOOL(big_endian_fb, BochsDisplayState),
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@ -334,7 +334,7 @@ static const VMStateDescription vmstate_cg3 = {
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = vmstate_cg3_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT16(height, CG3State),
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VMSTATE_UINT16(width, CG3State),
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VMSTATE_UINT16(depth, CG3State),
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@ -2739,7 +2739,7 @@ const VMStateDescription vmstate_cirrus_vga = {
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.version_id = 2,
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.minimum_version_id = 1,
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.post_load = cirrus_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(vga.latch, CirrusVGAState),
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VMSTATE_UINT8(vga.sr_index, CirrusVGAState),
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VMSTATE_BUFFER(vga.sr, CirrusVGAState),
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@ -2777,7 +2777,7 @@ static const VMStateDescription vmstate_pci_cirrus_vga = {
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.name = "cirrus_vga",
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_PCI_DEVICE(dev, PCICirrusVGAState),
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VMSTATE_STRUCT(cirrus_vga, PCICirrusVGAState, 0,
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vmstate_cirrus_vga, CirrusVGAState),
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@ -135,7 +135,7 @@ static const VMStateDescription vmstate_dpcd = {
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.name = TYPE_DPCD,
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT8_ARRAY_V(dpcd_info, DPCDState, DPCD_READABLE_AREA, 0),
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VMSTATE_END_OF_LIST()
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}
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@ -1865,7 +1865,7 @@ static const VMStateDescription exynos4210_fimd_window_vmstate = {
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.name = "exynos4210.fimd_window",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(wincon, Exynos4210fimdWindow),
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VMSTATE_UINT32_ARRAY(buf_start, Exynos4210fimdWindow, 3),
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VMSTATE_UINT32_ARRAY(buf_end, Exynos4210fimdWindow, 3),
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@ -1895,7 +1895,7 @@ static const VMStateDescription exynos4210_fimd_vmstate = {
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = exynos4210_fimd_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32_ARRAY(vidcon, Exynos4210fimdState, 4),
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VMSTATE_UINT32_ARRAY(vidtcon, Exynos4210fimdState, 4),
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VMSTATE_UINT32(shadowcon, Exynos4210fimdState),
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@ -455,7 +455,7 @@ static const VMStateDescription vmstate_g364fb = {
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.version_id = 2,
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.minimum_version_id = 2,
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.post_load = g364fb_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3),
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VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9),
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VMSTATE_UINT16_ARRAY(cursor, G364State, 512),
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@ -521,7 +521,7 @@ static const VMStateDescription vmstate_g364fb_sysbus = {
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.name = "g364fb-sysbus",
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(g364, G364SysBusState, 2, vmstate_g364fb, G364State),
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VMSTATE_END_OF_LIST()
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}
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@ -88,7 +88,7 @@ static void i2c_ddc_init(Object *obj)
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static const VMStateDescription vmstate_i2c_ddc = {
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.name = TYPE_I2CDDC,
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.version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_BOOL(firstbyte, I2CDDCState),
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VMSTATE_UINT8(reg, I2CDDCState),
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VMSTATE_END_OF_LIST()
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@ -257,7 +257,7 @@ static const VMStateDescription vmstate_jazz_led = {
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.version_id = 0,
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.minimum_version_id = 0,
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.post_load = jazz_led_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT8(segments, LedState),
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VMSTATE_END_OF_LIST()
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}
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@ -627,7 +627,7 @@ static const VMStateDescription vmstate_macfb = {
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = macfb_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT8(type, MacfbState),
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VMSTATE_UINT8_ARRAY(color_palette, MacfbState, 256 * 3),
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VMSTATE_UINT32(palette_current, MacfbState),
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@ -770,7 +770,7 @@ static const VMStateDescription vmstate_macfb_sysbus = {
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.name = "macfb-sysbus",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(macfb, MacfbSysBusState, 1, vmstate_macfb, MacfbState),
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VMSTATE_END_OF_LIST()
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}
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@ -789,7 +789,7 @@ static const VMStateDescription vmstate_macfb_nubus = {
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.name = "macfb-nubus",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(macfb, MacfbNubusState, 1, vmstate_macfb, MacfbState),
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VMSTATE_END_OF_LIST()
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}
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@ -83,7 +83,7 @@ static const VMStateDescription vmstate_pl110 = {
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.version_id = 2,
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.minimum_version_id = 1,
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.post_load = vmstate_pl110_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(version, PL110State),
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VMSTATE_UINT32_ARRAY(timing, PL110State, 4),
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VMSTATE_UINT32(cr, PL110State),
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@ -1371,7 +1371,7 @@ static const VMStateDescription vmstate_dma_channel = {
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.name = "dma_channel",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(branch, struct DMAChannel),
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VMSTATE_UINT8(up, struct DMAChannel),
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VMSTATE_BUFFER(pbuffer, struct DMAChannel),
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@ -1398,7 +1398,7 @@ static const VMStateDescription vmstate_pxa2xx_lcdc = {
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.version_id = 0,
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.minimum_version_id = 0,
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.post_load = pxa2xx_lcdc_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(irqlevel, PXA2xxLCDState),
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VMSTATE_INT32(transp, PXA2xxLCDState),
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VMSTATE_UINT32_ARRAY(control, PXA2xxLCDState, 6),
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@ -2388,7 +2388,7 @@ static const VMStateDescription qxl_memslot = {
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.name = "qxl-memslot",
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.version_id = QXL_SAVE_VERSION,
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.minimum_version_id = QXL_SAVE_VERSION,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT64(slot.mem_start, struct guest_slots),
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VMSTATE_UINT64(slot.mem_end, struct guest_slots),
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VMSTATE_UINT32(active, struct guest_slots),
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@ -2400,7 +2400,7 @@ static const VMStateDescription qxl_surface = {
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.name = "qxl-surface",
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.version_id = QXL_SAVE_VERSION,
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.minimum_version_id = QXL_SAVE_VERSION,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(width, QXLSurfaceCreate),
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VMSTATE_UINT32(height, QXLSurfaceCreate),
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VMSTATE_INT32(stride, QXLSurfaceCreate),
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@ -2419,7 +2419,7 @@ static const VMStateDescription qxl_vmstate_monitors_config = {
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = qxl_monitors_config_needed,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT64(guest_monitors_config, PCIQXLDevice),
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VMSTATE_END_OF_LIST()
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},
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@ -2432,7 +2432,7 @@ static const VMStateDescription qxl_vmstate = {
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.pre_save = qxl_pre_save,
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.pre_load = qxl_pre_load,
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.post_load = qxl_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_PCI_DEVICE(pci, PCIQXLDevice),
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VMSTATE_STRUCT(vga, PCIQXLDevice, 0, vmstate_vga_common, VGACommonState),
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VMSTATE_UINT32(shadow_rom.mode, PCIQXLDevice),
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@ -2452,7 +2452,7 @@ static const VMStateDescription qxl_vmstate = {
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VMSTATE_UINT64(guest_cursor, PCIQXLDevice),
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VMSTATE_END_OF_LIST()
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},
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.subsections = (const VMStateDescription*[]) {
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.subsections = (const VMStateDescription * const []) {
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&qxl_vmstate_monitors_config,
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NULL
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}
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@ -54,7 +54,7 @@ static const VMStateDescription ramfb_dev_vmstate = {
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = migrate_needed,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT_POINTER(state, RAMFBStandaloneState, ramfb_vmstate, RAMFBState),
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VMSTATE_END_OF_LIST()
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}
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@ -129,7 +129,7 @@ const VMStateDescription ramfb_vmstate = {
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = ramfb_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_BUFFER_UNSAFE(cfg, RAMFBState, 0, sizeof(RAMFBCfg)),
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VMSTATE_END_OF_LIST()
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}
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@ -51,7 +51,7 @@ static const VMStateDescription vmstate_sii9022 = {
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.name = "sii9022",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_I2C_SLAVE(parent_obj, sii9022_state),
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VMSTATE_UINT8(ptr, sii9022_state),
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VMSTATE_BOOL(addr_byte, sii9022_state),
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@ -1940,7 +1940,7 @@ static const VMStateDescription vmstate_sm501_state = {
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.name = "sm501-state",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(local_mem_size_index, SM501State),
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VMSTATE_UINT32(system_control, SM501State),
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VMSTATE_UINT32(misc_control, SM501State),
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@ -2071,7 +2071,7 @@ static const VMStateDescription vmstate_sm501_sysbus = {
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.name = TYPE_SYSBUS_SM501,
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(state, SM501SysBusState, 1,
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vmstate_sm501_state, SM501State),
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VMSTATE_END_OF_LIST()
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@ -2161,7 +2161,7 @@ static const VMStateDescription vmstate_sm501_pci = {
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.name = TYPE_PCI_SM501,
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_PCI_DEVICE(parent_obj, SM501PCIState),
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VMSTATE_STRUCT(state, SM501PCIState, 1,
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vmstate_sm501_state, SM501State),
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@ -281,7 +281,7 @@ static const VMStateDescription vmstate_ssd0303 = {
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.name = "ssd0303_oled",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(row, ssd0303_state),
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VMSTATE_INT32(col, ssd0303_state),
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VMSTATE_INT32(start_line, ssd0303_state),
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@ -324,7 +324,7 @@ static const VMStateDescription vmstate_ssd0323 = {
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.version_id = 2,
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.minimum_version_id = 2,
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.post_load = ssd0323_post_load,
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.fields = (VMStateField []) {
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.fields = (const VMStateField []) {
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VMSTATE_UINT32(cmd_len, ssd0323_state),
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VMSTATE_INT32(cmd, ssd0323_state),
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VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
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@ -344,7 +344,7 @@ static const VMStateDescription vmstate_tcx = {
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.version_id = 4,
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.minimum_version_id = 4,
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.post_load = vmstate_tcx_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT16(height, TCXState),
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VMSTATE_UINT16(width, TCXState),
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VMSTATE_UINT16(depth, TCXState),
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@ -61,7 +61,7 @@ static const VMStateDescription vmstate_vga_pci = {
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.name = "vga",
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_PCI_DEVICE(dev, PCIVGAState),
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VMSTATE_STRUCT(vga, PCIVGAState, 0, vmstate_vga_common, VGACommonState),
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VMSTATE_END_OF_LIST()
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@ -2106,7 +2106,7 @@ static const VMStateDescription vmstate_vga_endian = {
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = vga_endian_state_needed,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_BOOL(big_endian_fb, VGACommonState),
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VMSTATE_END_OF_LIST()
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}
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@ -2117,7 +2117,7 @@ const VMStateDescription vmstate_vga_common = {
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.version_id = 2,
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.minimum_version_id = 2,
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.post_load = vga_common_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(latch, VGACommonState),
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VMSTATE_UINT8(sr_index, VGACommonState),
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VMSTATE_PARTIAL_BUFFER(sr, VGACommonState, 8),
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@ -2149,7 +2149,7 @@ const VMStateDescription vmstate_vga_common = {
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VMSTATE_UINT32(vbe_bank_mask, VGACommonState),
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VMSTATE_END_OF_LIST()
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},
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.subsections = (const VMStateDescription*[]) {
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.subsections = (const VMStateDescription * const []) {
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&vmstate_vga_endian,
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NULL
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}
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@ -1164,7 +1164,7 @@ static void virtio_gpu_cursor_bh(void *opaque)
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static const VMStateDescription vmstate_virtio_gpu_scanout = {
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.name = "virtio-gpu-one-scanout",
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.version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout),
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VMSTATE_UINT32(width, struct virtio_gpu_scanout),
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VMSTATE_UINT32(height, struct virtio_gpu_scanout),
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@ -1182,7 +1182,7 @@ static const VMStateDescription vmstate_virtio_gpu_scanout = {
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static const VMStateDescription vmstate_virtio_gpu_scanouts = {
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.name = "virtio-gpu-scanouts",
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.version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(parent_obj.enable, struct VirtIOGPU),
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VMSTATE_UINT32_EQUAL(parent_obj.conf.max_outputs,
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struct VirtIOGPU, NULL),
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@ -1592,7 +1592,7 @@ static const VMStateDescription vmstate_virtio_gpu = {
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.name = "virtio-gpu",
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.minimum_version_id = VIRTIO_GPU_VM_VERSION,
|
||||
.version_id = VIRTIO_GPU_VM_VERSION,
|
||||
.fields = (VMStateField[]) {
|
||||
.fields = (const VMStateField[]) {
|
||||
VMSTATE_VIRTIO_DEVICE /* core */,
|
||||
{
|
||||
.name = "virtio-gpu",
|
||||
|
@ -1605,7 +1605,7 @@ static const VMStateDescription vmstate_virtio_gpu = {
|
|||
} /* device */,
|
||||
VMSTATE_END_OF_LIST()
|
||||
},
|
||||
.subsections = (const VMStateDescription * []) {
|
||||
.subsections = (const VMStateDescription * const []) {
|
||||
&vmstate_virtio_gpu_blob_state,
|
||||
NULL
|
||||
},
|
||||
|
|
|
@ -88,7 +88,7 @@ static const VMStateDescription vmstate_virtio_vga_base = {
|
|||
.name = "virtio-vga",
|
||||
.version_id = 2,
|
||||
.minimum_version_id = 2,
|
||||
.fields = (VMStateField[]) {
|
||||
.fields = (const VMStateField[]) {
|
||||
/* no pci stuff here, saving the virtio device will handle that */
|
||||
VMSTATE_STRUCT(vga, VirtIOVGABase, 0,
|
||||
vmstate_vga_common, VGACommonState),
|
||||
|
|
|
@ -1210,7 +1210,7 @@ static const VMStateDescription vmstate_vmware_vga_internal = {
|
|||
.version_id = 0,
|
||||
.minimum_version_id = 0,
|
||||
.post_load = vmsvga_post_load,
|
||||
.fields = (VMStateField[]) {
|
||||
.fields = (const VMStateField[]) {
|
||||
VMSTATE_INT32_EQUAL(new_depth, struct vmsvga_state_s, NULL),
|
||||
VMSTATE_INT32(enable, struct vmsvga_state_s),
|
||||
VMSTATE_INT32(config, struct vmsvga_state_s),
|
||||
|
@ -1235,7 +1235,7 @@ static const VMStateDescription vmstate_vmware_vga = {
|
|||
.name = "vmware_vga",
|
||||
.version_id = 0,
|
||||
.minimum_version_id = 0,
|
||||
.fields = (VMStateField[]) {
|
||||
.fields = (const VMStateField[]) {
|
||||
VMSTATE_PCI_DEVICE(parent_obj, struct pci_vmsvga_state_s),
|
||||
VMSTATE_STRUCT(chip, struct pci_vmsvga_state_s, 0,
|
||||
vmstate_vmware_vga_internal, struct vmsvga_state_s),
|
||||
|
|
|
@ -262,7 +262,7 @@ typedef enum DPVideoFmt DPVideoFmt;
|
|||
static const VMStateDescription vmstate_dp = {
|
||||
.name = TYPE_XLNX_DP,
|
||||
.version_id = 2,
|
||||
.fields = (VMStateField[]){
|
||||
.fields = (const VMStateField[]){
|
||||
VMSTATE_UINT32_ARRAY(core_registers, XlnxDPState,
|
||||
DP_CORE_REG_ARRAY_SIZE),
|
||||
VMSTATE_UINT32_ARRAY(avbufm_registers, XlnxDPState,
|
||||
|
|
Loading…
Reference in New Issue