From 4e655e3cd80535328794c763681a6aa11a69178f Mon Sep 17 00:00:00 2001 From: Kele Huang Date: Thu, 1 Apr 2021 18:04:57 +0800 Subject: [PATCH 1/2] tcg/mips: Fix SoftTLB comparison on mips backend MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The addrl used to compare with SoftTLB entry should be sign-extended in common case, and it will cause constant failing in SoftTLB comparisons for the addrl whose address is over 0x80000000 on the emulation of 32-bit guest on 64-bit host. This is an important performance bug fix. Spec2000 gzip rate increase from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform). Signed-off-by: Kele Huang Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210401100457.191458-1-kele.hwang@gmail.com> Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 8738a3a581..8b16726242 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -1201,13 +1201,13 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl, load the tlb addend for the fast path. */ tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off); } - tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl); /* Zero extend a 32-bit guest address for a 64-bit host. */ if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) { tcg_out_ext32u(s, base, addrl); addrl = base; } + tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl); label_ptr[0] = s->code_ptr; tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); From ef951ee33fba780dd6c2b7f8ff25c84c3f87a6b8 Mon Sep 17 00:00:00 2001 From: Pavel Dovgalyuk Date: Mon, 29 Mar 2021 10:42:10 +0300 Subject: [PATCH 2/2] target/alpha: fix icount handling for timer instructions This patch handles icount mode for timer read/write instructions, because it is required to call gen_io_start in such cases. Signed-off-by: Pavel Dovgalyuk Reviewed-by: Richard Henderson Message-Id: <161700373035.1135822.16451510827008616793.stgit@pasha-ThinkPad-X280> Signed-off-by: Richard Henderson --- target/alpha/translate.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index a02b4e70b7..f454adea5e 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1330,7 +1330,7 @@ static DisasJumpType gen_mfpr(DisasContext *ctx, TCGv va, int regno) case 249: /* VMTIME */ helper = gen_helper_get_vmtime; do_helper: - if (icount_enabled()) { + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); helper(va); return DISAS_PC_STALE; @@ -1366,6 +1366,7 @@ static DisasJumpType gen_mfpr(DisasContext *ctx, TCGv va, int regno) static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) { int data; + DisasJumpType ret = DISAS_NEXT; switch (regno) { case 255: @@ -1395,6 +1396,10 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) case 251: /* ALARM */ + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + ret = DISAS_PC_STALE; + } gen_helper_set_alarm(cpu_env, vb); break; @@ -1434,7 +1439,7 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) break; } - return DISAS_NEXT; + return ret; } #endif /* !USER_ONLY*/