mirror of https://github.com/xemu-project/xemu.git
target-arm: cpu: Move cpu_is_big_endian to header
There is a CPU data endianness test that is used to drive the virtio_big_endian test. Move this up to the header so it can be more generally used for endian tests. The KVM specific cpu_syncronize_state call is left behind in the virtio specific function. Rename it arm_cpu-data_is_big_endian() to more accurately capture that this is for data accesses only. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -369,26 +369,13 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level)
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#endif
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}
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static bool arm_cpu_is_big_endian(CPUState *cs)
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static bool arm_cpu_virtio_is_big_endian(CPUState *cs)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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int cur_el;
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cpu_synchronize_state(cs);
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/* In 32bit guest endianness is determined by looking at CPSR's E bit */
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if (!is_a64(env)) {
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return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
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}
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cur_el = arm_current_el(env);
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if (cur_el == 0) {
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return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
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}
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return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
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return arm_cpu_data_is_big_endian(env);
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}
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#endif
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@ -1476,7 +1463,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
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cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
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cc->asidx_from_attrs = arm_asidx_from_attrs;
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cc->vmsd = &vmstate_arm_cpu;
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cc->virtio_is_big_endian = arm_cpu_is_big_endian;
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cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
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cc->write_elf64_note = arm_cpu_write_elf64_note;
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cc->write_elf32_note = arm_cpu_write_elf32_note;
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#endif
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@ -1908,6 +1908,25 @@ static inline bool arm_sctlr_b(CPUARMState *env)
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(env->cp15.sctlr_el[1] & SCTLR_B) != 0;
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}
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/* Return true if the processor is in big-endian mode. */
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static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
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{
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int cur_el;
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/* In 32bit endianness is determined by looking at CPSR's E bit */
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if (!is_a64(env)) {
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return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
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}
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cur_el = arm_current_el(env);
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if (cur_el == 0) {
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return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
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}
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return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
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}
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#include "exec/cpu-all.h"
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/* Bit usage in the TB flags field: bit 31 indicates whether we are
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