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interrupt naming

This commit is contained in:
espes 2015-06-12 19:12:56 +10:00
parent 291a95d3f0
commit ecba64bbd7
3 changed files with 12 additions and 12 deletions
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4
hw/xbox/dsp/dsp.c
View File

@ -179,8 +179,8 @@ void dsp_info(dsp_core_t* dsp)
fputs("\n", stderr);
fprintf(stderr, "- Pending ints: ");
for (i = 0; i < ARRAYSIZE(dsp->interrupt_isPending); i++) {
fprintf(stderr, " %04hx", dsp->interrupt_isPending[i]);
for (i = 0; i < ARRAYSIZE(dsp->interrupt_is_pending); i++) {
fprintf(stderr, " %04hx", dsp->interrupt_is_pending[i]);
}
fputs("\n", stderr);
}

16
hw/xbox/dsp/dsp_cpu.c
View File

@ -377,7 +377,7 @@ void dsp56k_init_cpu(dsp_core_t* dsp)
}
/* Interruptions */
memset(dsp->interrupt_isPending, 0, sizeof(dsp->interrupt_isPending));
memset(dsp->interrupt_is_pending, 0, sizeof(dsp->interrupt_is_pending));
dsp->interrupt_state = DSP_INTERRUPT_NONE;
dsp->interrupt_instr_fetch = -1;
dsp->interrupt_save_pc = -1;
@ -761,8 +761,8 @@ void dsp56k_add_interrupt(dsp_core_t* dsp, uint16_t inter)
return;
/* add this interrupt to the pending interrupts table */
if (dsp->interrupt_isPending[inter] == 0) {
dsp->interrupt_isPending[inter] = 1;
if (dsp->interrupt_is_pending[inter] == 0) {
dsp->interrupt_is_pending[inter] = 1;
dsp->interrupt_counter ++;
}
}
@ -797,7 +797,7 @@ static void dsp_postexecute_interrupts(dsp_core_t* dsp)
dsp->registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_LF)|(1<<DSP_SR_T) |
(1<<DSP_SR_S1)|(1<<DSP_SR_S0) |
(1<<DSP_SR_I0)|(1<<DSP_SR_I1));
dsp->registers[DSP_REG_SR] |= dsp->interrupt_IplToRaise<<DSP_SR_I0;
dsp->registers[DSP_REG_SR] |= dsp->interrupt_ipl_to_raise<<DSP_SR_I0;
}
dsp->interrupt_pipeline_count --;
return;
@ -811,7 +811,7 @@ static void dsp_postexecute_interrupts(dsp_core_t* dsp)
dsp->registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_LF)|(1<<DSP_SR_T) |
(1<<DSP_SR_S1)|(1<<DSP_SR_S0) |
(1<<DSP_SR_I0)|(1<<DSP_SR_I1));
dsp->registers[DSP_REG_SR] |= dsp->interrupt_IplToRaise<<DSP_SR_I0;
dsp->registers[DSP_REG_SR] |= dsp->interrupt_ipl_to_raise<<DSP_SR_I0;
}
}
dsp->interrupt_pipeline_count --;
@ -857,7 +857,7 @@ static void dsp_postexecute_interrupts(dsp_core_t* dsp)
/* Arbitrate between all pending interrupts */
for (i=0; i<12; i++) {
if (dsp->interrupt_isPending[i] == 1) {
if (dsp->interrupt_is_pending[i] == 1) {
/* level 3 interrupt ? */
if (dsp->interrupt_ipl[i] == 3) {
@ -886,7 +886,7 @@ static void dsp_postexecute_interrupts(dsp_core_t* dsp)
}
/* remove this interrupt from the pending interrupts table */
dsp->interrupt_isPending[index] = 0;
dsp->interrupt_is_pending[index] = 0;
dsp->interrupt_counter --;
/* process arbritrated interrupt */
@ -898,7 +898,7 @@ static void dsp_postexecute_interrupts(dsp_core_t* dsp)
dsp->interrupt_instr_fetch = dsp_interrupt[index].vectorAddr;
dsp->interrupt_pipeline_count = 5;
dsp->interrupt_state = DSP_INTERRUPT_DISABLED;
dsp->interrupt_IplToRaise = ipl_to_raise;
dsp->interrupt_ipl_to_raise = ipl_to_raise;
DPRINTF("Dsp interrupt: %s\n", dsp_interrupt[index].name);

4
hw/xbox/dsp/dsp_int.h
View File

@ -173,10 +173,10 @@ struct dsp_core_s {
uint16_t interrupt_instr_fetch; /* vector of the current interrupt */
uint16_t interrupt_save_pc; /* save next pc value before interrupt */
uint16_t interrupt_counter; /* count number of pending interrupts */
uint16_t interrupt_IplToRaise; /* save the IPL level to save in the SR register */
uint16_t interrupt_ipl_to_raise; /* save the IPL level to save in the SR register */
uint16_t interrupt_pipeline_count; /* used to prefetch correctly the 2 inter instructions */
int16_t interrupt_ipl[12]; /* store the current IPL for each interrupt */
uint16_t interrupt_isPending[12]; /* store if interrupt is pending for each interrupt */
uint16_t interrupt_is_pending[12]; /* store if interrupt is pending for each interrupt */
/* runtime data */