mirror of https://github.com/xemu-project/xemu.git
target/loongarch: Add a check parameter to the TRANS macro
The default check parmeter is ALL. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-8-gaosong@loongson.cn> Message-Id: <20230822071959.35620-2-philmd@linaro.org>
This commit is contained in:
Song Gao
parent
6496269d7e
commit
ec3a951891
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@ -248,45 +248,45 @@ static bool trans_addu16i_d(DisasContext *ctx, arg_addu16i_d *a)
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return true;
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}
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TRANS(add_w, gen_rrr, EXT_NONE, EXT_NONE, EXT_SIGN, tcg_gen_add_tl)
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TRANS(add_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_add_tl)
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TRANS(sub_w, gen_rrr, EXT_NONE, EXT_NONE, EXT_SIGN, tcg_gen_sub_tl)
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TRANS(sub_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_sub_tl)
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TRANS(and, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_and_tl)
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TRANS(or, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_or_tl)
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TRANS(xor, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_xor_tl)
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TRANS(nor, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_nor_tl)
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TRANS(andn, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_andc_tl)
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TRANS(orn, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_orc_tl)
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TRANS(slt, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_slt)
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TRANS(sltu, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sltu)
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TRANS(mul_w, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_SIGN, tcg_gen_mul_tl)
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TRANS(mul_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_mul_tl)
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TRANS(mulh_w, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_NONE, gen_mulh_w)
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TRANS(mulh_wu, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_NONE, gen_mulh_w)
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TRANS(mulh_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_mulh_d)
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TRANS(mulh_du, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_mulh_du)
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TRANS(mulw_d_w, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_NONE, tcg_gen_mul_tl)
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TRANS(mulw_d_wu, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_NONE, tcg_gen_mul_tl)
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TRANS(div_w, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_SIGN, gen_div_w)
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TRANS(mod_w, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_SIGN, gen_rem_w)
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TRANS(div_wu, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_SIGN, gen_div_du)
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TRANS(mod_wu, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_SIGN, gen_rem_du)
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TRANS(div_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_div_d)
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TRANS(mod_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rem_d)
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TRANS(div_du, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_div_du)
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TRANS(mod_du, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rem_du)
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TRANS(slti, gen_rri_v, EXT_NONE, EXT_NONE, gen_slt)
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TRANS(sltui, gen_rri_v, EXT_NONE, EXT_NONE, gen_sltu)
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TRANS(addi_w, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_addi_tl)
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TRANS(addi_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_addi_tl)
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TRANS(alsl_w, gen_rrr_sa, EXT_NONE, EXT_SIGN, gen_alsl)
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TRANS(alsl_wu, gen_rrr_sa, EXT_NONE, EXT_ZERO, gen_alsl)
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TRANS(alsl_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_alsl)
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TRANS(pcaddi, gen_pc, gen_pcaddi)
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TRANS(pcalau12i, gen_pc, gen_pcalau12i)
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TRANS(pcaddu12i, gen_pc, gen_pcaddu12i)
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TRANS(pcaddu18i, gen_pc, gen_pcaddu18i)
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TRANS(andi, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_andi_tl)
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TRANS(ori, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_ori_tl)
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TRANS(xori, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_xori_tl)
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TRANS(add_w, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_SIGN, tcg_gen_add_tl)
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TRANS(add_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_add_tl)
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TRANS(sub_w, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_SIGN, tcg_gen_sub_tl)
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TRANS(sub_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_sub_tl)
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TRANS(and, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_and_tl)
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TRANS(or, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_or_tl)
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TRANS(xor, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_xor_tl)
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TRANS(nor, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_nor_tl)
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TRANS(andn, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_andc_tl)
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TRANS(orn, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_orc_tl)
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TRANS(slt, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_slt)
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TRANS(sltu, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sltu)
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TRANS(mul_w, ALL, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_SIGN, tcg_gen_mul_tl)
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TRANS(mul_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_mul_tl)
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TRANS(mulh_w, ALL, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_NONE, gen_mulh_w)
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TRANS(mulh_wu, ALL, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_NONE, gen_mulh_w)
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TRANS(mulh_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_mulh_d)
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TRANS(mulh_du, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_mulh_du)
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TRANS(mulw_d_w, ALL, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_NONE, tcg_gen_mul_tl)
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TRANS(mulw_d_wu, ALL, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_NONE, tcg_gen_mul_tl)
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TRANS(div_w, ALL, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_SIGN, gen_div_w)
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TRANS(mod_w, ALL, gen_rrr, EXT_SIGN, EXT_SIGN, EXT_SIGN, gen_rem_w)
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TRANS(div_wu, ALL, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_SIGN, gen_div_du)
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TRANS(mod_wu, ALL, gen_rrr, EXT_ZERO, EXT_ZERO, EXT_SIGN, gen_rem_du)
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TRANS(div_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_div_d)
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TRANS(mod_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rem_d)
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TRANS(div_du, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_div_du)
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TRANS(mod_du, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rem_du)
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TRANS(slti, ALL, gen_rri_v, EXT_NONE, EXT_NONE, gen_slt)
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TRANS(sltui, ALL, gen_rri_v, EXT_NONE, EXT_NONE, gen_sltu)
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TRANS(addi_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_addi_tl)
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TRANS(addi_d, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_addi_tl)
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TRANS(alsl_w, ALL, gen_rrr_sa, EXT_NONE, EXT_SIGN, gen_alsl)
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TRANS(alsl_wu, ALL, gen_rrr_sa, EXT_NONE, EXT_ZERO, gen_alsl)
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TRANS(alsl_d, ALL, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_alsl)
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TRANS(pcaddi, ALL, gen_pc, gen_pcaddi)
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TRANS(pcalau12i, ALL, gen_pc, gen_pcalau12i)
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TRANS(pcaddu12i, ALL, gen_pc, gen_pcaddu12i)
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TRANS(pcaddu18i, ALL, gen_pc, gen_pcaddu18i)
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TRANS(andi, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_andi_tl)
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TRANS(ori, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_ori_tl)
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TRANS(xori, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_xori_tl)
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@ -69,43 +69,43 @@ static bool gen_am(DisasContext *ctx, arg_rrr *a,
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return true;
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}
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TRANS(ll_w, gen_ll, MO_TESL)
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TRANS(sc_w, gen_sc, MO_TESL)
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TRANS(ll_d, gen_ll, MO_TEUQ)
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TRANS(sc_d, gen_sc, MO_TEUQ)
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TRANS(amswap_w, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)
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TRANS(amswap_d, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)
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TRANS(amadd_w, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)
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TRANS(amadd_d, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)
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TRANS(amand_w, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)
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TRANS(amand_d, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)
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TRANS(amor_w, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)
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TRANS(amor_d, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)
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TRANS(amxor_w, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)
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TRANS(amxor_d, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)
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TRANS(ammax_w, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)
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TRANS(ammax_d, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)
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TRANS(ammin_w, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)
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TRANS(ammin_d, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)
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TRANS(ammax_wu, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)
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TRANS(ammax_du, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)
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TRANS(ammin_wu, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)
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TRANS(ammin_du, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)
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TRANS(amswap_db_w, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)
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TRANS(amswap_db_d, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)
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TRANS(amadd_db_w, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)
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TRANS(amadd_db_d, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)
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TRANS(amand_db_w, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)
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TRANS(amand_db_d, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)
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TRANS(amor_db_w, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)
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TRANS(amor_db_d, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)
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TRANS(amxor_db_w, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)
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TRANS(amxor_db_d, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)
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TRANS(ammax_db_w, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)
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TRANS(ammax_db_d, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)
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TRANS(ammin_db_w, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)
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TRANS(ammin_db_d, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)
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TRANS(ammax_db_wu, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)
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TRANS(ammax_db_du, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)
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TRANS(ammin_db_wu, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)
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TRANS(ammin_db_du, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)
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TRANS(ll_w, ALL, gen_ll, MO_TESL)
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TRANS(sc_w, ALL, gen_sc, MO_TESL)
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TRANS(ll_d, ALL, gen_ll, MO_TEUQ)
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TRANS(sc_d, ALL, gen_sc, MO_TEUQ)
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TRANS(amswap_w, ALL, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)
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TRANS(amswap_d, ALL, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)
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TRANS(amadd_w, ALL, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)
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TRANS(amadd_d, ALL, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)
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TRANS(amand_w, ALL, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)
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TRANS(amand_d, ALL, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)
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TRANS(amor_w, ALL, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)
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TRANS(amor_d, ALL, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)
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TRANS(amxor_w, ALL, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)
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TRANS(amxor_d, ALL, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)
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TRANS(ammax_w, ALL, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)
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TRANS(ammax_d, ALL, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)
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TRANS(ammin_w, ALL, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)
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TRANS(ammin_d, ALL, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)
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TRANS(ammax_wu, ALL, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)
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TRANS(ammax_du, ALL, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)
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TRANS(ammin_wu, ALL, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)
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TRANS(ammin_du, ALL, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)
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TRANS(amswap_db_w, ALL, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)
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TRANS(amswap_db_d, ALL, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)
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TRANS(amadd_db_w, ALL, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)
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TRANS(amadd_db_d, ALL, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)
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TRANS(amand_db_w, ALL, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)
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TRANS(amand_db_d, ALL, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)
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TRANS(amor_db_w, ALL, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)
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TRANS(amor_db_d, ALL, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)
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TRANS(amxor_db_w, ALL, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)
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TRANS(amxor_db_d, ALL, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)
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TRANS(ammax_db_w, ALL, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)
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TRANS(ammax_db_d, ALL, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)
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TRANS(ammin_db_w, ALL, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)
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TRANS(ammin_db_d, ALL, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)
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TRANS(ammax_db_wu, ALL, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)
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TRANS(ammax_db_du, ALL, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)
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TRANS(ammin_db_wu, ALL, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)
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TRANS(ammin_db_du, ALL, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)
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@ -178,31 +178,31 @@ static void gen_masknez(TCGv dest, TCGv src1, TCGv src2)
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tcg_gen_movcond_tl(TCG_COND_NE, dest, src2, zero, zero, src1);
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}
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TRANS(ext_w_h, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_ext16s_tl)
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TRANS(ext_w_b, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_ext8s_tl)
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TRANS(clo_w, gen_rr, EXT_NONE, EXT_NONE, gen_clo_w)
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TRANS(clz_w, gen_rr, EXT_ZERO, EXT_NONE, gen_clz_w)
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TRANS(cto_w, gen_rr, EXT_NONE, EXT_NONE, gen_cto_w)
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TRANS(ctz_w, gen_rr, EXT_NONE, EXT_NONE, gen_ctz_w)
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TRANS(clo_d, gen_rr, EXT_NONE, EXT_NONE, gen_clo_d)
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TRANS(clz_d, gen_rr, EXT_NONE, EXT_NONE, gen_clz_d)
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TRANS(cto_d, gen_rr, EXT_NONE, EXT_NONE, gen_cto_d)
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TRANS(ctz_d, gen_rr, EXT_NONE, EXT_NONE, gen_ctz_d)
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TRANS(revb_2h, gen_rr, EXT_NONE, EXT_SIGN, gen_revb_2h)
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TRANS(revb_4h, gen_rr, EXT_NONE, EXT_NONE, gen_revb_4h)
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TRANS(revb_2w, gen_rr, EXT_NONE, EXT_NONE, gen_revb_2w)
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TRANS(revb_d, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_bswap64_i64)
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TRANS(revh_2w, gen_rr, EXT_NONE, EXT_NONE, gen_revh_2w)
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TRANS(revh_d, gen_rr, EXT_NONE, EXT_NONE, gen_revh_d)
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TRANS(bitrev_4b, gen_rr, EXT_ZERO, EXT_SIGN, gen_helper_bitswap)
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TRANS(bitrev_8b, gen_rr, EXT_NONE, EXT_NONE, gen_helper_bitswap)
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TRANS(bitrev_w, gen_rr, EXT_NONE, EXT_SIGN, gen_helper_bitrev_w)
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TRANS(bitrev_d, gen_rr, EXT_NONE, EXT_NONE, gen_helper_bitrev_d)
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TRANS(maskeqz, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_maskeqz)
|
||||
TRANS(masknez, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_masknez)
|
||||
TRANS(bytepick_w, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_w)
|
||||
TRANS(bytepick_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_d)
|
||||
TRANS(bstrins_w, gen_bstrins, EXT_SIGN)
|
||||
TRANS(bstrins_d, gen_bstrins, EXT_NONE)
|
||||
TRANS(bstrpick_w, gen_bstrpick, EXT_SIGN)
|
||||
TRANS(bstrpick_d, gen_bstrpick, EXT_NONE)
|
||||
TRANS(ext_w_h, ALL, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_ext16s_tl)
|
||||
TRANS(ext_w_b, ALL, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_ext8s_tl)
|
||||
TRANS(clo_w, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_clo_w)
|
||||
TRANS(clz_w, ALL, gen_rr, EXT_ZERO, EXT_NONE, gen_clz_w)
|
||||
TRANS(cto_w, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_cto_w)
|
||||
TRANS(ctz_w, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_ctz_w)
|
||||
TRANS(clo_d, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_clo_d)
|
||||
TRANS(clz_d, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_clz_d)
|
||||
TRANS(cto_d, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_cto_d)
|
||||
TRANS(ctz_d, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_ctz_d)
|
||||
TRANS(revb_2h, ALL, gen_rr, EXT_NONE, EXT_SIGN, gen_revb_2h)
|
||||
TRANS(revb_4h, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_revb_4h)
|
||||
TRANS(revb_2w, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_revb_2w)
|
||||
TRANS(revb_d, ALL, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_bswap64_i64)
|
||||
TRANS(revh_2w, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_revh_2w)
|
||||
TRANS(revh_d, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_revh_d)
|
||||
TRANS(bitrev_4b, ALL, gen_rr, EXT_ZERO, EXT_SIGN, gen_helper_bitswap)
|
||||
TRANS(bitrev_8b, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_helper_bitswap)
|
||||
TRANS(bitrev_w, ALL, gen_rr, EXT_NONE, EXT_SIGN, gen_helper_bitrev_w)
|
||||
TRANS(bitrev_d, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_helper_bitrev_d)
|
||||
TRANS(maskeqz, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_maskeqz)
|
||||
TRANS(masknez, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_masknez)
|
||||
TRANS(bytepick_w, ALL, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_w)
|
||||
TRANS(bytepick_d, ALL, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_d)
|
||||
TRANS(bstrins_w, ALL, gen_bstrins, EXT_SIGN)
|
||||
TRANS(bstrins_d, ALL, gen_bstrins, EXT_NONE)
|
||||
TRANS(bstrpick_w, ALL, gen_bstrpick, EXT_SIGN)
|
||||
TRANS(bstrpick_d, ALL, gen_bstrpick, EXT_NONE)
|
||||
|
|
|
|||
|
|
@ -72,13 +72,13 @@ static bool gen_cz_bc(DisasContext *ctx, arg_c_offs *a, TCGCond cond)
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(beq, gen_rr_bc, TCG_COND_EQ)
|
||||
TRANS(bne, gen_rr_bc, TCG_COND_NE)
|
||||
TRANS(blt, gen_rr_bc, TCG_COND_LT)
|
||||
TRANS(bge, gen_rr_bc, TCG_COND_GE)
|
||||
TRANS(bltu, gen_rr_bc, TCG_COND_LTU)
|
||||
TRANS(bgeu, gen_rr_bc, TCG_COND_GEU)
|
||||
TRANS(beqz, gen_rz_bc, TCG_COND_EQ)
|
||||
TRANS(bnez, gen_rz_bc, TCG_COND_NE)
|
||||
TRANS(bceqz, gen_cz_bc, TCG_COND_EQ)
|
||||
TRANS(bcnez, gen_cz_bc, TCG_COND_NE)
|
||||
TRANS(beq, ALL, gen_rr_bc, TCG_COND_EQ)
|
||||
TRANS(bne, ALL, gen_rr_bc, TCG_COND_NE)
|
||||
TRANS(blt, ALL, gen_rr_bc, TCG_COND_LT)
|
||||
TRANS(bge, ALL, gen_rr_bc, TCG_COND_GE)
|
||||
TRANS(bltu, ALL, gen_rr_bc, TCG_COND_LTU)
|
||||
TRANS(bgeu, ALL, gen_rr_bc, TCG_COND_GEU)
|
||||
TRANS(beqz, ALL, gen_rz_bc, TCG_COND_EQ)
|
||||
TRANS(bnez, ALL, gen_rz_bc, TCG_COND_NE)
|
||||
TRANS(bceqz, ALL, gen_cz_bc, TCG_COND_EQ)
|
||||
TRANS(bcnez, ALL, gen_cz_bc, TCG_COND_NE)
|
||||
|
|
|
|||
|
|
@ -89,11 +89,11 @@ static bool gen_crc(DisasContext *ctx, arg_rrr *a,
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(crc_w_b_w, gen_crc, gen_helper_crc32, tcg_constant_tl(1))
|
||||
TRANS(crc_w_h_w, gen_crc, gen_helper_crc32, tcg_constant_tl(2))
|
||||
TRANS(crc_w_w_w, gen_crc, gen_helper_crc32, tcg_constant_tl(4))
|
||||
TRANS(crc_w_d_w, gen_crc, gen_helper_crc32, tcg_constant_tl(8))
|
||||
TRANS(crcc_w_b_w, gen_crc, gen_helper_crc32c, tcg_constant_tl(1))
|
||||
TRANS(crcc_w_h_w, gen_crc, gen_helper_crc32c, tcg_constant_tl(2))
|
||||
TRANS(crcc_w_w_w, gen_crc, gen_helper_crc32c, tcg_constant_tl(4))
|
||||
TRANS(crcc_w_d_w, gen_crc, gen_helper_crc32c, tcg_constant_tl(8))
|
||||
TRANS(crc_w_b_w, ALL, gen_crc, gen_helper_crc32, tcg_constant_tl(1))
|
||||
TRANS(crc_w_h_w, ALL, gen_crc, gen_helper_crc32, tcg_constant_tl(2))
|
||||
TRANS(crc_w_w_w, ALL, gen_crc, gen_helper_crc32, tcg_constant_tl(4))
|
||||
TRANS(crc_w_d_w, ALL, gen_crc, gen_helper_crc32, tcg_constant_tl(8))
|
||||
TRANS(crcc_w_b_w, ALL, gen_crc, gen_helper_crc32c, tcg_constant_tl(1))
|
||||
TRANS(crcc_w_h_w, ALL, gen_crc, gen_helper_crc32c, tcg_constant_tl(2))
|
||||
TRANS(crcc_w_w_w, ALL, gen_crc, gen_helper_crc32c, tcg_constant_tl(4))
|
||||
TRANS(crcc_w_d_w, ALL, gen_crc, gen_helper_crc32c, tcg_constant_tl(8))
|
||||
|
|
|
|||
|
|
@ -143,41 +143,41 @@ static bool trans_fneg_d(DisasContext *ctx, arg_fneg_d *a)
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(fadd_s, gen_fff, gen_helper_fadd_s)
|
||||
TRANS(fadd_d, gen_fff, gen_helper_fadd_d)
|
||||
TRANS(fsub_s, gen_fff, gen_helper_fsub_s)
|
||||
TRANS(fsub_d, gen_fff, gen_helper_fsub_d)
|
||||
TRANS(fmul_s, gen_fff, gen_helper_fmul_s)
|
||||
TRANS(fmul_d, gen_fff, gen_helper_fmul_d)
|
||||
TRANS(fdiv_s, gen_fff, gen_helper_fdiv_s)
|
||||
TRANS(fdiv_d, gen_fff, gen_helper_fdiv_d)
|
||||
TRANS(fmax_s, gen_fff, gen_helper_fmax_s)
|
||||
TRANS(fmax_d, gen_fff, gen_helper_fmax_d)
|
||||
TRANS(fmin_s, gen_fff, gen_helper_fmin_s)
|
||||
TRANS(fmin_d, gen_fff, gen_helper_fmin_d)
|
||||
TRANS(fmaxa_s, gen_fff, gen_helper_fmaxa_s)
|
||||
TRANS(fmaxa_d, gen_fff, gen_helper_fmaxa_d)
|
||||
TRANS(fmina_s, gen_fff, gen_helper_fmina_s)
|
||||
TRANS(fmina_d, gen_fff, gen_helper_fmina_d)
|
||||
TRANS(fscaleb_s, gen_fff, gen_helper_fscaleb_s)
|
||||
TRANS(fscaleb_d, gen_fff, gen_helper_fscaleb_d)
|
||||
TRANS(fsqrt_s, gen_ff, gen_helper_fsqrt_s)
|
||||
TRANS(fsqrt_d, gen_ff, gen_helper_fsqrt_d)
|
||||
TRANS(frecip_s, gen_ff, gen_helper_frecip_s)
|
||||
TRANS(frecip_d, gen_ff, gen_helper_frecip_d)
|
||||
TRANS(frsqrt_s, gen_ff, gen_helper_frsqrt_s)
|
||||
TRANS(frsqrt_d, gen_ff, gen_helper_frsqrt_d)
|
||||
TRANS(flogb_s, gen_ff, gen_helper_flogb_s)
|
||||
TRANS(flogb_d, gen_ff, gen_helper_flogb_d)
|
||||
TRANS(fclass_s, gen_ff, gen_helper_fclass_s)
|
||||
TRANS(fclass_d, gen_ff, gen_helper_fclass_d)
|
||||
TRANS(fmadd_s, gen_muladd, gen_helper_fmuladd_s, 0)
|
||||
TRANS(fmadd_d, gen_muladd, gen_helper_fmuladd_d, 0)
|
||||
TRANS(fmsub_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_c)
|
||||
TRANS(fmsub_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_c)
|
||||
TRANS(fnmadd_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_result)
|
||||
TRANS(fnmadd_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_result)
|
||||
TRANS(fnmsub_s, gen_muladd, gen_helper_fmuladd_s,
|
||||
TRANS(fadd_s, ALL, gen_fff, gen_helper_fadd_s)
|
||||
TRANS(fadd_d, ALL, gen_fff, gen_helper_fadd_d)
|
||||
TRANS(fsub_s, ALL, gen_fff, gen_helper_fsub_s)
|
||||
TRANS(fsub_d, ALL, gen_fff, gen_helper_fsub_d)
|
||||
TRANS(fmul_s, ALL, gen_fff, gen_helper_fmul_s)
|
||||
TRANS(fmul_d, ALL, gen_fff, gen_helper_fmul_d)
|
||||
TRANS(fdiv_s, ALL, gen_fff, gen_helper_fdiv_s)
|
||||
TRANS(fdiv_d, ALL, gen_fff, gen_helper_fdiv_d)
|
||||
TRANS(fmax_s, ALL, gen_fff, gen_helper_fmax_s)
|
||||
TRANS(fmax_d, ALL, gen_fff, gen_helper_fmax_d)
|
||||
TRANS(fmin_s, ALL, gen_fff, gen_helper_fmin_s)
|
||||
TRANS(fmin_d, ALL, gen_fff, gen_helper_fmin_d)
|
||||
TRANS(fmaxa_s, ALL, gen_fff, gen_helper_fmaxa_s)
|
||||
TRANS(fmaxa_d, ALL, gen_fff, gen_helper_fmaxa_d)
|
||||
TRANS(fmina_s, ALL, gen_fff, gen_helper_fmina_s)
|
||||
TRANS(fmina_d, ALL, gen_fff, gen_helper_fmina_d)
|
||||
TRANS(fscaleb_s, ALL, gen_fff, gen_helper_fscaleb_s)
|
||||
TRANS(fscaleb_d, ALL, gen_fff, gen_helper_fscaleb_d)
|
||||
TRANS(fsqrt_s, ALL, gen_ff, gen_helper_fsqrt_s)
|
||||
TRANS(fsqrt_d, ALL, gen_ff, gen_helper_fsqrt_d)
|
||||
TRANS(frecip_s, ALL, gen_ff, gen_helper_frecip_s)
|
||||
TRANS(frecip_d, ALL, gen_ff, gen_helper_frecip_d)
|
||||
TRANS(frsqrt_s, ALL, gen_ff, gen_helper_frsqrt_s)
|
||||
TRANS(frsqrt_d, ALL, gen_ff, gen_helper_frsqrt_d)
|
||||
TRANS(flogb_s, ALL, gen_ff, gen_helper_flogb_s)
|
||||
TRANS(flogb_d, ALL, gen_ff, gen_helper_flogb_d)
|
||||
TRANS(fclass_s, ALL, gen_ff, gen_helper_fclass_s)
|
||||
TRANS(fclass_d, ALL, gen_ff, gen_helper_fclass_d)
|
||||
TRANS(fmadd_s, ALL, gen_muladd, gen_helper_fmuladd_s, 0)
|
||||
TRANS(fmadd_d, ALL, gen_muladd, gen_helper_fmuladd_d, 0)
|
||||
TRANS(fmsub_s, ALL, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_c)
|
||||
TRANS(fmsub_d, ALL, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_c)
|
||||
TRANS(fnmadd_s, ALL, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_result)
|
||||
TRANS(fnmadd_d, ALL, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_result)
|
||||
TRANS(fnmsub_s, ALL, gen_muladd, gen_helper_fmuladd_s,
|
||||
float_muladd_negate_c | float_muladd_negate_result)
|
||||
TRANS(fnmsub_d, gen_muladd, gen_helper_fmuladd_d,
|
||||
TRANS(fnmsub_d, ALL, gen_muladd, gen_helper_fmuladd_d,
|
||||
float_muladd_negate_c | float_muladd_negate_result)
|
||||
|
|
|
|||
|
|
@ -3,31 +3,31 @@
|
|||
* Copyright (c) 2021 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
TRANS(fcvt_s_d, gen_ff, gen_helper_fcvt_s_d)
|
||||
TRANS(fcvt_d_s, gen_ff, gen_helper_fcvt_d_s)
|
||||
TRANS(ftintrm_w_s, gen_ff, gen_helper_ftintrm_w_s)
|
||||
TRANS(ftintrm_w_d, gen_ff, gen_helper_ftintrm_w_d)
|
||||
TRANS(ftintrm_l_s, gen_ff, gen_helper_ftintrm_l_s)
|
||||
TRANS(ftintrm_l_d, gen_ff, gen_helper_ftintrm_l_d)
|
||||
TRANS(ftintrp_w_s, gen_ff, gen_helper_ftintrp_w_s)
|
||||
TRANS(ftintrp_w_d, gen_ff, gen_helper_ftintrp_w_d)
|
||||
TRANS(ftintrp_l_s, gen_ff, gen_helper_ftintrp_l_s)
|
||||
TRANS(ftintrp_l_d, gen_ff, gen_helper_ftintrp_l_d)
|
||||
TRANS(ftintrz_w_s, gen_ff, gen_helper_ftintrz_w_s)
|
||||
TRANS(ftintrz_w_d, gen_ff, gen_helper_ftintrz_w_d)
|
||||
TRANS(ftintrz_l_s, gen_ff, gen_helper_ftintrz_l_s)
|
||||
TRANS(ftintrz_l_d, gen_ff, gen_helper_ftintrz_l_d)
|
||||
TRANS(ftintrne_w_s, gen_ff, gen_helper_ftintrne_w_s)
|
||||
TRANS(ftintrne_w_d, gen_ff, gen_helper_ftintrne_w_d)
|
||||
TRANS(ftintrne_l_s, gen_ff, gen_helper_ftintrne_l_s)
|
||||
TRANS(ftintrne_l_d, gen_ff, gen_helper_ftintrne_l_d)
|
||||
TRANS(ftint_w_s, gen_ff, gen_helper_ftint_w_s)
|
||||
TRANS(ftint_w_d, gen_ff, gen_helper_ftint_w_d)
|
||||
TRANS(ftint_l_s, gen_ff, gen_helper_ftint_l_s)
|
||||
TRANS(ftint_l_d, gen_ff, gen_helper_ftint_l_d)
|
||||
TRANS(ffint_s_w, gen_ff, gen_helper_ffint_s_w)
|
||||
TRANS(ffint_s_l, gen_ff, gen_helper_ffint_s_l)
|
||||
TRANS(ffint_d_w, gen_ff, gen_helper_ffint_d_w)
|
||||
TRANS(ffint_d_l, gen_ff, gen_helper_ffint_d_l)
|
||||
TRANS(frint_s, gen_ff, gen_helper_frint_s)
|
||||
TRANS(frint_d, gen_ff, gen_helper_frint_d)
|
||||
TRANS(fcvt_s_d, ALL, gen_ff, gen_helper_fcvt_s_d)
|
||||
TRANS(fcvt_d_s, ALL, gen_ff, gen_helper_fcvt_d_s)
|
||||
TRANS(ftintrm_w_s, ALL, gen_ff, gen_helper_ftintrm_w_s)
|
||||
TRANS(ftintrm_w_d, ALL, gen_ff, gen_helper_ftintrm_w_d)
|
||||
TRANS(ftintrm_l_s, ALL, gen_ff, gen_helper_ftintrm_l_s)
|
||||
TRANS(ftintrm_l_d, ALL, gen_ff, gen_helper_ftintrm_l_d)
|
||||
TRANS(ftintrp_w_s, ALL, gen_ff, gen_helper_ftintrp_w_s)
|
||||
TRANS(ftintrp_w_d, ALL, gen_ff, gen_helper_ftintrp_w_d)
|
||||
TRANS(ftintrp_l_s, ALL, gen_ff, gen_helper_ftintrp_l_s)
|
||||
TRANS(ftintrp_l_d, ALL, gen_ff, gen_helper_ftintrp_l_d)
|
||||
TRANS(ftintrz_w_s, ALL, gen_ff, gen_helper_ftintrz_w_s)
|
||||
TRANS(ftintrz_w_d, ALL, gen_ff, gen_helper_ftintrz_w_d)
|
||||
TRANS(ftintrz_l_s, ALL, gen_ff, gen_helper_ftintrz_l_s)
|
||||
TRANS(ftintrz_l_d, ALL, gen_ff, gen_helper_ftintrz_l_d)
|
||||
TRANS(ftintrne_w_s, ALL, gen_ff, gen_helper_ftintrne_w_s)
|
||||
TRANS(ftintrne_w_d, ALL, gen_ff, gen_helper_ftintrne_w_d)
|
||||
TRANS(ftintrne_l_s, ALL, gen_ff, gen_helper_ftintrne_l_s)
|
||||
TRANS(ftintrne_l_d, ALL, gen_ff, gen_helper_ftintrne_l_d)
|
||||
TRANS(ftint_w_s, ALL, gen_ff, gen_helper_ftint_w_s)
|
||||
TRANS(ftint_w_d, ALL, gen_ff, gen_helper_ftint_w_d)
|
||||
TRANS(ftint_l_s, ALL, gen_ff, gen_helper_ftint_l_s)
|
||||
TRANS(ftint_l_d, ALL, gen_ff, gen_helper_ftint_l_d)
|
||||
TRANS(ffint_s_w, ALL, gen_ff, gen_helper_ffint_s_w)
|
||||
TRANS(ffint_s_l, ALL, gen_ff, gen_helper_ffint_s_l)
|
||||
TRANS(ffint_d_w, ALL, gen_ff, gen_helper_ffint_d_w)
|
||||
TRANS(ffint_d_l, ALL, gen_ff, gen_helper_ffint_d_l)
|
||||
TRANS(frint_s, ALL, gen_ff, gen_helper_frint_s)
|
||||
TRANS(frint_d, ALL, gen_ff, gen_helper_frint_d)
|
||||
|
|
|
|||
|
|
@ -140,19 +140,19 @@ static bool gen_fstore_le(DisasContext *ctx, arg_frr *a, MemOp mop)
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(fld_s, gen_fload_i, MO_TEUL)
|
||||
TRANS(fst_s, gen_fstore_i, MO_TEUL)
|
||||
TRANS(fld_d, gen_fload_i, MO_TEUQ)
|
||||
TRANS(fst_d, gen_fstore_i, MO_TEUQ)
|
||||
TRANS(fldx_s, gen_floadx, MO_TEUL)
|
||||
TRANS(fldx_d, gen_floadx, MO_TEUQ)
|
||||
TRANS(fstx_s, gen_fstorex, MO_TEUL)
|
||||
TRANS(fstx_d, gen_fstorex, MO_TEUQ)
|
||||
TRANS(fldgt_s, gen_fload_gt, MO_TEUL)
|
||||
TRANS(fldgt_d, gen_fload_gt, MO_TEUQ)
|
||||
TRANS(fldle_s, gen_fload_le, MO_TEUL)
|
||||
TRANS(fldle_d, gen_fload_le, MO_TEUQ)
|
||||
TRANS(fstgt_s, gen_fstore_gt, MO_TEUL)
|
||||
TRANS(fstgt_d, gen_fstore_gt, MO_TEUQ)
|
||||
TRANS(fstle_s, gen_fstore_le, MO_TEUL)
|
||||
TRANS(fstle_d, gen_fstore_le, MO_TEUQ)
|
||||
TRANS(fld_s, ALL, gen_fload_i, MO_TEUL)
|
||||
TRANS(fst_s, ALL, gen_fstore_i, MO_TEUL)
|
||||
TRANS(fld_d, ALL, gen_fload_i, MO_TEUQ)
|
||||
TRANS(fst_d, ALL, gen_fstore_i, MO_TEUQ)
|
||||
TRANS(fldx_s, ALL, gen_floadx, MO_TEUL)
|
||||
TRANS(fldx_d, ALL, gen_floadx, MO_TEUQ)
|
||||
TRANS(fstx_s, ALL, gen_fstorex, MO_TEUL)
|
||||
TRANS(fstx_d, ALL, gen_fstorex, MO_TEUQ)
|
||||
TRANS(fldgt_s, ALL, gen_fload_gt, MO_TEUL)
|
||||
TRANS(fldgt_d, ALL, gen_fload_gt, MO_TEUQ)
|
||||
TRANS(fldle_s, ALL, gen_fload_le, MO_TEUL)
|
||||
TRANS(fldle_d, ALL, gen_fload_le, MO_TEUQ)
|
||||
TRANS(fstgt_s, ALL, gen_fstore_gt, MO_TEUL)
|
||||
TRANS(fstgt_d, ALL, gen_fstore_gt, MO_TEUQ)
|
||||
TRANS(fstle_s, ALL, gen_fstore_le, MO_TEUL)
|
||||
TRANS(fstle_d, ALL, gen_fstore_le, MO_TEUQ)
|
||||
|
|
|
|||
|
|
@ -178,11 +178,11 @@ static bool trans_movcf2gr(DisasContext *ctx, arg_movcf2gr *a)
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(fmov_s, gen_f2f, tcg_gen_mov_tl, true)
|
||||
TRANS(fmov_d, gen_f2f, tcg_gen_mov_tl, false)
|
||||
TRANS(movgr2fr_w, gen_r2f, gen_movgr2fr_w)
|
||||
TRANS(movgr2fr_d, gen_r2f, tcg_gen_mov_tl)
|
||||
TRANS(movgr2frh_w, gen_r2f, gen_movgr2frh_w)
|
||||
TRANS(movfr2gr_s, gen_f2r, tcg_gen_ext32s_tl)
|
||||
TRANS(movfr2gr_d, gen_f2r, tcg_gen_mov_tl)
|
||||
TRANS(movfrh2gr_s, gen_f2r, gen_movfrh2gr_s)
|
||||
TRANS(fmov_s, ALL, gen_f2f, tcg_gen_mov_tl, true)
|
||||
TRANS(fmov_d, ALL, gen_f2f, tcg_gen_mov_tl, false)
|
||||
TRANS(movgr2fr_w, ALL, gen_r2f, gen_movgr2fr_w)
|
||||
TRANS(movgr2fr_d, ALL, gen_r2f, tcg_gen_mov_tl)
|
||||
TRANS(movgr2frh_w, ALL, gen_r2f, gen_movgr2frh_w)
|
||||
TRANS(movfr2gr_s, ALL, gen_f2r, tcg_gen_ext32s_tl)
|
||||
TRANS(movfr2gr_d, ALL, gen_f2r, tcg_gen_mov_tl)
|
||||
TRANS(movfrh2gr_s, ALL, gen_f2r, gen_movfrh2gr_s)
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -145,45 +145,45 @@ static bool gen_stptr(DisasContext *ctx, arg_rr_i *a, MemOp mop)
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(ld_b, gen_load, MO_SB)
|
||||
TRANS(ld_h, gen_load, MO_TESW)
|
||||
TRANS(ld_w, gen_load, MO_TESL)
|
||||
TRANS(ld_d, gen_load, MO_TEUQ)
|
||||
TRANS(st_b, gen_store, MO_UB)
|
||||
TRANS(st_h, gen_store, MO_TEUW)
|
||||
TRANS(st_w, gen_store, MO_TEUL)
|
||||
TRANS(st_d, gen_store, MO_TEUQ)
|
||||
TRANS(ld_bu, gen_load, MO_UB)
|
||||
TRANS(ld_hu, gen_load, MO_TEUW)
|
||||
TRANS(ld_wu, gen_load, MO_TEUL)
|
||||
TRANS(ldx_b, gen_loadx, MO_SB)
|
||||
TRANS(ldx_h, gen_loadx, MO_TESW)
|
||||
TRANS(ldx_w, gen_loadx, MO_TESL)
|
||||
TRANS(ldx_d, gen_loadx, MO_TEUQ)
|
||||
TRANS(stx_b, gen_storex, MO_UB)
|
||||
TRANS(stx_h, gen_storex, MO_TEUW)
|
||||
TRANS(stx_w, gen_storex, MO_TEUL)
|
||||
TRANS(stx_d, gen_storex, MO_TEUQ)
|
||||
TRANS(ldx_bu, gen_loadx, MO_UB)
|
||||
TRANS(ldx_hu, gen_loadx, MO_TEUW)
|
||||
TRANS(ldx_wu, gen_loadx, MO_TEUL)
|
||||
TRANS(ldptr_w, gen_ldptr, MO_TESL)
|
||||
TRANS(stptr_w, gen_stptr, MO_TEUL)
|
||||
TRANS(ldptr_d, gen_ldptr, MO_TEUQ)
|
||||
TRANS(stptr_d, gen_stptr, MO_TEUQ)
|
||||
TRANS(ldgt_b, gen_load_gt, MO_SB)
|
||||
TRANS(ldgt_h, gen_load_gt, MO_TESW)
|
||||
TRANS(ldgt_w, gen_load_gt, MO_TESL)
|
||||
TRANS(ldgt_d, gen_load_gt, MO_TEUQ)
|
||||
TRANS(ldle_b, gen_load_le, MO_SB)
|
||||
TRANS(ldle_h, gen_load_le, MO_TESW)
|
||||
TRANS(ldle_w, gen_load_le, MO_TESL)
|
||||
TRANS(ldle_d, gen_load_le, MO_TEUQ)
|
||||
TRANS(stgt_b, gen_store_gt, MO_UB)
|
||||
TRANS(stgt_h, gen_store_gt, MO_TEUW)
|
||||
TRANS(stgt_w, gen_store_gt, MO_TEUL)
|
||||
TRANS(stgt_d, gen_store_gt, MO_TEUQ)
|
||||
TRANS(stle_b, gen_store_le, MO_UB)
|
||||
TRANS(stle_h, gen_store_le, MO_TEUW)
|
||||
TRANS(stle_w, gen_store_le, MO_TEUL)
|
||||
TRANS(stle_d, gen_store_le, MO_TEUQ)
|
||||
TRANS(ld_b, ALL, gen_load, MO_SB)
|
||||
TRANS(ld_h, ALL, gen_load, MO_TESW)
|
||||
TRANS(ld_w, ALL, gen_load, MO_TESL)
|
||||
TRANS(ld_d, ALL, gen_load, MO_TEUQ)
|
||||
TRANS(st_b, ALL, gen_store, MO_UB)
|
||||
TRANS(st_h, ALL, gen_store, MO_TEUW)
|
||||
TRANS(st_w, ALL, gen_store, MO_TEUL)
|
||||
TRANS(st_d, ALL, gen_store, MO_TEUQ)
|
||||
TRANS(ld_bu, ALL, gen_load, MO_UB)
|
||||
TRANS(ld_hu, ALL, gen_load, MO_TEUW)
|
||||
TRANS(ld_wu, ALL, gen_load, MO_TEUL)
|
||||
TRANS(ldx_b, ALL, gen_loadx, MO_SB)
|
||||
TRANS(ldx_h, ALL, gen_loadx, MO_TESW)
|
||||
TRANS(ldx_w, ALL, gen_loadx, MO_TESL)
|
||||
TRANS(ldx_d, ALL, gen_loadx, MO_TEUQ)
|
||||
TRANS(stx_b, ALL, gen_storex, MO_UB)
|
||||
TRANS(stx_h, ALL, gen_storex, MO_TEUW)
|
||||
TRANS(stx_w, ALL, gen_storex, MO_TEUL)
|
||||
TRANS(stx_d, ALL, gen_storex, MO_TEUQ)
|
||||
TRANS(ldx_bu, ALL, gen_loadx, MO_UB)
|
||||
TRANS(ldx_hu, ALL, gen_loadx, MO_TEUW)
|
||||
TRANS(ldx_wu, ALL, gen_loadx, MO_TEUL)
|
||||
TRANS(ldptr_w, ALL, gen_ldptr, MO_TESL)
|
||||
TRANS(stptr_w, ALL, gen_stptr, MO_TEUL)
|
||||
TRANS(ldptr_d, ALL, gen_ldptr, MO_TEUQ)
|
||||
TRANS(stptr_d, ALL, gen_stptr, MO_TEUQ)
|
||||
TRANS(ldgt_b, ALL, gen_load_gt, MO_SB)
|
||||
TRANS(ldgt_h, ALL, gen_load_gt, MO_TESW)
|
||||
TRANS(ldgt_w, ALL, gen_load_gt, MO_TESL)
|
||||
TRANS(ldgt_d, ALL, gen_load_gt, MO_TEUQ)
|
||||
TRANS(ldle_b, ALL, gen_load_le, MO_SB)
|
||||
TRANS(ldle_h, ALL, gen_load_le, MO_TESW)
|
||||
TRANS(ldle_w, ALL, gen_load_le, MO_TESL)
|
||||
TRANS(ldle_d, ALL, gen_load_le, MO_TEUQ)
|
||||
TRANS(stgt_b, ALL, gen_store_gt, MO_UB)
|
||||
TRANS(stgt_h, ALL, gen_store_gt, MO_TEUW)
|
||||
TRANS(stgt_w, ALL, gen_store_gt, MO_TEUL)
|
||||
TRANS(stgt_d, ALL, gen_store_gt, MO_TEUQ)
|
||||
TRANS(stle_b, ALL, gen_store_le, MO_UB)
|
||||
TRANS(stle_h, ALL, gen_store_le, MO_TEUW)
|
||||
TRANS(stle_w, ALL, gen_store_le, MO_TEUL)
|
||||
TRANS(stle_d, ALL, gen_store_le, MO_TEUQ)
|
||||
|
|
|
|||
|
|
@ -312,14 +312,14 @@ static bool gen_iocsrwr(DisasContext *ctx, arg_rr *a,
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(iocsrrd_b, gen_iocsrrd, gen_helper_iocsrrd_b)
|
||||
TRANS(iocsrrd_h, gen_iocsrrd, gen_helper_iocsrrd_h)
|
||||
TRANS(iocsrrd_w, gen_iocsrrd, gen_helper_iocsrrd_w)
|
||||
TRANS(iocsrrd_d, gen_iocsrrd, gen_helper_iocsrrd_d)
|
||||
TRANS(iocsrwr_b, gen_iocsrwr, gen_helper_iocsrwr_b)
|
||||
TRANS(iocsrwr_h, gen_iocsrwr, gen_helper_iocsrwr_h)
|
||||
TRANS(iocsrwr_w, gen_iocsrwr, gen_helper_iocsrwr_w)
|
||||
TRANS(iocsrwr_d, gen_iocsrwr, gen_helper_iocsrwr_d)
|
||||
TRANS(iocsrrd_b, ALL, gen_iocsrrd, gen_helper_iocsrrd_b)
|
||||
TRANS(iocsrrd_h, ALL, gen_iocsrrd, gen_helper_iocsrrd_h)
|
||||
TRANS(iocsrrd_w, ALL, gen_iocsrrd, gen_helper_iocsrrd_w)
|
||||
TRANS(iocsrrd_d, ALL, gen_iocsrrd, gen_helper_iocsrrd_d)
|
||||
TRANS(iocsrwr_b, ALL, gen_iocsrwr, gen_helper_iocsrwr_b)
|
||||
TRANS(iocsrwr_h, ALL, gen_iocsrwr, gen_helper_iocsrwr_h)
|
||||
TRANS(iocsrwr_w, ALL, gen_iocsrwr, gen_helper_iocsrwr_w)
|
||||
TRANS(iocsrwr_d, ALL, gen_iocsrwr, gen_helper_iocsrwr_d)
|
||||
|
||||
static void check_mmu_idx(DisasContext *ctx)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -78,18 +78,18 @@ static bool trans_srai_w(DisasContext *ctx, arg_srai_w *a)
|
|||
return true;
|
||||
}
|
||||
|
||||
TRANS(sll_w, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_sll_w)
|
||||
TRANS(srl_w, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_srl_w)
|
||||
TRANS(sra_w, gen_rrr, EXT_SIGN, EXT_NONE, EXT_SIGN, gen_sra_w)
|
||||
TRANS(sll_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sll_d)
|
||||
TRANS(srl_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_srl_d)
|
||||
TRANS(sra_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sra_d)
|
||||
TRANS(rotr_w, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_rotr_w)
|
||||
TRANS(rotr_d, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rotr_d)
|
||||
TRANS(slli_w, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl)
|
||||
TRANS(slli_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
|
||||
TRANS(srli_w, gen_rri_c, EXT_ZERO, EXT_SIGN, tcg_gen_shri_tl)
|
||||
TRANS(srli_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
|
||||
TRANS(srai_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
|
||||
TRANS(rotri_w, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
|
||||
TRANS(rotri_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
|
||||
TRANS(sll_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_sll_w)
|
||||
TRANS(srl_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_srl_w)
|
||||
TRANS(sra_w, ALL, gen_rrr, EXT_SIGN, EXT_NONE, EXT_SIGN, gen_sra_w)
|
||||
TRANS(sll_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sll_d)
|
||||
TRANS(srl_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_srl_d)
|
||||
TRANS(sra_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_sra_d)
|
||||
TRANS(rotr_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_rotr_w)
|
||||
TRANS(rotr_d, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_rotr_d)
|
||||
TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl)
|
||||
TRANS(slli_d, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
|
||||
TRANS(srli_w, ALL, gen_rri_c, EXT_ZERO, EXT_SIGN, tcg_gen_shri_tl)
|
||||
TRANS(srli_d, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
|
||||
TRANS(srai_d, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
|
||||
TRANS(rotri_w, ALL, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
|
||||
TRANS(rotri_d, ALL, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
|
||||
|
|
|
|||
|
|
@ -10,9 +10,11 @@
|
|||
|
||||
#include "exec/translator.h"
|
||||
|
||||
#define TRANS(NAME, FUNC, ...) \
|
||||
#define TRANS(NAME, AVAIL, FUNC, ...) \
|
||||
static bool trans_##NAME(DisasContext *ctx, arg_##NAME * a) \
|
||||
{ return FUNC(ctx, a, __VA_ARGS__); }
|
||||
{ return avail_##AVAIL(ctx) && FUNC(ctx, a, __VA_ARGS__); }
|
||||
|
||||
#define avail_ALL(C) true
|
||||
|
||||
/*
|
||||
* If an operation is being performed on less than TARGET_LONG_BITS,
|
||||
|
|
|
|||
Loading…
Reference in New Issue