mirror of https://github.com/xemu-project/xemu.git
tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128
Fill in the parameters for libffi for Int128. Adjust the interpreter to allow for 16-byte return values. Adjust tcg_out_call to record the return value length. Call parameters are no longer all the same size, so we cannot reuse the same call_slots array for every function. Compute it each time now, but only fill in slots required for the call we're about to make. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
896c76e6ba
commit
e9709e17ac
19
tcg/tcg.c
19
tcg/tcg.c
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@ -570,6 +570,22 @@ static GHashTable *helper_table;
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#ifdef CONFIG_TCG_INTERPRETER
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static ffi_type *typecode_to_ffi(int argmask)
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{
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/*
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* libffi does not support __int128_t, so we have forced Int128
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* to use the structure definition instead of the builtin type.
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*/
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static ffi_type *ffi_type_i128_elements[3] = {
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&ffi_type_uint64,
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&ffi_type_uint64,
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NULL
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};
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static ffi_type ffi_type_i128 = {
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.size = 16,
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.alignment = __alignof__(Int128),
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.type = FFI_TYPE_STRUCT,
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.elements = ffi_type_i128_elements,
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};
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switch (argmask) {
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case dh_typecode_void:
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return &ffi_type_void;
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@ -583,6 +599,8 @@ static ffi_type *typecode_to_ffi(int argmask)
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return &ffi_type_sint64;
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case dh_typecode_ptr:
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return &ffi_type_pointer;
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case dh_typecode_i128:
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return &ffi_type_i128;
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}
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g_assert_not_reached();
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}
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@ -613,6 +631,7 @@ static void init_ffi_layouts(void)
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/* Ignoring the return type, find the last non-zero field. */
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nargs = 32 - clz32(typemask >> 3);
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nargs = DIV_ROUND_UP(nargs, 3);
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assert(nargs <= MAX_CALL_IARGS);
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ca = g_malloc0(sizeof(*ca) + nargs * sizeof(ffi_type *));
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ca->cif.rtype = typecode_to_ffi(typemask & 7);
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44
tcg/tci.c
44
tcg/tci.c
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@ -470,12 +470,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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tcg_target_ulong regs[TCG_TARGET_NB_REGS];
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uint64_t stack[(TCG_STATIC_CALL_ARGS_SIZE + TCG_STATIC_FRAME_SIZE)
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/ sizeof(uint64_t)];
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void *call_slots[TCG_STATIC_CALL_ARGS_SIZE / sizeof(uint64_t)];
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regs[TCG_AREG0] = (tcg_target_ulong)env;
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regs[TCG_REG_CALL_STACK] = (uintptr_t)stack;
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/* Other call_slots entries initialized at first use (see below). */
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call_slots[0] = NULL;
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tci_assert(tb_ptr);
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for (;;) {
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@ -498,26 +495,26 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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switch (opc) {
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case INDEX_op_call:
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/*
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* Set up the ffi_avalue array once, delayed until now
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* because many TB's do not make any calls. In tcg_gen_callN,
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* we arranged for every real argument to be "left-aligned"
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* in each 64-bit slot.
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*/
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if (unlikely(call_slots[0] == NULL)) {
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for (int i = 0; i < ARRAY_SIZE(call_slots); ++i) {
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call_slots[i] = &stack[i];
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}
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}
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tci_args_nl(insn, tb_ptr, &len, &ptr);
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/* Helper functions may need to access the "return address" */
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tci_tb_ptr = (uintptr_t)tb_ptr;
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{
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void **pptr = ptr;
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ffi_call(pptr[1], pptr[0], stack, call_slots);
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void *call_slots[MAX_CALL_IARGS];
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ffi_cif *cif;
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void *func;
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unsigned i, s, n;
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tci_args_nl(insn, tb_ptr, &len, &ptr);
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func = ((void **)ptr)[0];
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cif = ((void **)ptr)[1];
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n = cif->nargs;
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for (i = s = 0; i < n; ++i) {
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ffi_type *t = cif->arg_types[i];
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call_slots[i] = &stack[s];
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s += DIV_ROUND_UP(t->size, 8);
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}
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/* Helper functions may need to access the "return address" */
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tci_tb_ptr = (uintptr_t)tb_ptr;
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ffi_call(cif, func, stack, call_slots);
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}
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switch (len) {
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@ -542,6 +539,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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*/
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memcpy(®s[TCG_REG_R0], stack, 8);
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break;
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case 3: /* Int128 */
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memcpy(®s[TCG_REG_R0], stack, 16);
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break;
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default:
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g_assert_not_reached();
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}
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@ -203,7 +203,7 @@ static const int tcg_target_call_iarg_regs[] = { };
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static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
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{
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tcg_debug_assert(kind == TCG_CALL_RET_NORMAL);
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tcg_debug_assert(slot >= 0 && slot < 64 / TCG_TARGET_REG_BITS);
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tcg_debug_assert(slot >= 0 && slot < 128 / TCG_TARGET_REG_BITS);
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return TCG_REG_R0 + slot;
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}
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@ -573,11 +573,11 @@ static void tcg_out_call(TCGContext *s, const tcg_insn_unit *func,
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if (cif->rtype == &ffi_type_void) {
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which = 0;
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} else if (cif->rtype->size == 4) {
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which = 1;
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} else {
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tcg_debug_assert(cif->rtype->size == 8);
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which = 2;
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tcg_debug_assert(cif->rtype->size == 4 ||
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cif->rtype->size == 8 ||
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cif->rtype->size == 16);
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which = ctz32(cif->rtype->size) - 1;
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}
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new_pool_l2(s, 20, s->code_ptr, 0, (uintptr_t)func, (uintptr_t)cif);
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insn = deposit32(insn, 0, 8, INDEX_op_call);
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@ -160,10 +160,13 @@ typedef enum {
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#if TCG_TARGET_REG_BITS == 32
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# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EVEN
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# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN
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# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
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#else
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# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
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# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
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# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
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#endif
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#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
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#define HAVE_TCG_QEMU_TB_EXEC
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#define TCG_TARGET_NEED_POOL_LABELS
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