mirror of https://github.com/xemu-project/xemu.git
hw/nvme: SR-IOV VFs must hardwire pci interrupt pin register to zero
The PCI Interrupt Pin Register does not apply to VFs and MUST be
hardwired to zero.
Fixes: 44c2c09488
("hw/nvme: Add support for SR-IOV")
Reviewed-by: Jesper Wendel Devantier <foss@defmacro.it>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
This commit is contained in:
parent
149f6e90b5
commit
e85987786d
|
@ -656,6 +656,12 @@ static void nvme_irq_check(NvmeCtrl *n)
|
|||
if (msix_enabled(pci)) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* vfs does not implement intx */
|
||||
if (pci_is_vf(pci)) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (~intms & n->irq_status) {
|
||||
pci_irq_assert(pci);
|
||||
} else {
|
||||
|
@ -8544,7 +8550,7 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)
|
|||
unsigned nr_vectors;
|
||||
int ret;
|
||||
|
||||
pci_conf[PCI_INTERRUPT_PIN] = 1;
|
||||
pci_conf[PCI_INTERRUPT_PIN] = pci_is_vf(pci_dev) ? 0 : 1;
|
||||
pci_config_set_prog_interface(pci_conf, 0x2);
|
||||
|
||||
if (n->params.use_intel_id) {
|
||||
|
|
Loading…
Reference in New Issue