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hw/rtc/ds1338: Trace send and receive operations 

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20241103143330.123596-2-shentey@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Bernhard Beschow 2024-11-05 10:09:59 +00:00 committed by Peter Maydell
parent a5c02408c1
commit e8217c573f
2 changed files with 10 additions and 0 deletions
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6
hw/rtc/ds1338.c
View File

@ -17,6 +17,7 @@
#include "qemu/module.h" #include "qemu/module.h"
#include "qom/object.h" #include "qom/object.h"
#include "sysemu/rtc.h" #include "sysemu/rtc.h"
#include "trace.h"
/* Size of NVRAM including both the user-accessible area and the /* Size of NVRAM including both the user-accessible area and the
* secondary register area. * secondary register area.
@ -126,6 +127,9 @@ static uint8_t ds1338_recv(I2CSlave *i2c)
uint8_t res; uint8_t res;
res = s->nvram[s->ptr]; res = s->nvram[s->ptr];
trace_ds1338_recv(s->ptr, res);
inc_regptr(s); inc_regptr(s);
return res; return res;
} }
@ -134,6 +138,8 @@ static int ds1338_send(I2CSlave *i2c, uint8_t data)
{ {
DS1338State *s = DS1338(i2c); DS1338State *s = DS1338(i2c);
trace_ds1338_send(s->ptr, data);
if (s->addr_byte) { if (s->addr_byte) {
s->ptr = data & (NVRAM_SIZE - 1); s->ptr = data & (NVRAM_SIZE - 1);
s->addr_byte = false; s->addr_byte = false;

4
hw/rtc/trace-events
View File

@ -22,6 +22,10 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
# ds1338.c
ds1338_recv(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] -> 0x%02" PRIx8
ds1338_send(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] <- 0x%02" PRIx8
# m48t59.c # m48t59.c
m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64 m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64 m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64