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hw/ide/ahci: Inline ahci_get_num_ports() 

Introduce the 'ich9' variable and inline ahci_get_num_ports().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240213081201.78951-5-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-02-13 08:31:45 +01:00
parent 41c05b41e3
commit e6097f1864
4 changed files with 8 additions and 13 deletions
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6
hw/i386/pc_q35.c
View File

@ -292,16 +292,18 @@ static void pc_q35_init(MachineState *machine)
if (pcms->sata_enabled) { if (pcms->sata_enabled) {
PCIDevice *pdev; PCIDevice *pdev;
AHCIPCIState *ich9;
/* ahci and SATA device, for q35 1 ahci controller is built-in */ /* ahci and SATA device, for q35 1 ahci controller is built-in */
pdev = pci_create_simple_multifunction(host_bus, pdev = pci_create_simple_multifunction(host_bus,
PCI_DEVFN(ICH9_SATA1_DEV, PCI_DEVFN(ICH9_SATA1_DEV,
ICH9_SATA1_FUNC), ICH9_SATA1_FUNC),
"ich9-ahci"); "ich9-ahci");
ich9 = ICH9_AHCI(pdev);
idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0"); idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0");
idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1"); idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1");
g_assert(MAX_SATA_PORTS == ahci_get_num_ports(pdev)); g_assert(MAX_SATA_PORTS == ich9->ahci.ports);
ide_drive_get(hd, ahci_get_num_ports(pdev)); ide_drive_get(hd, ich9->ahci.ports);
ahci_ide_create_devs(pdev, hd); ahci_ide_create_devs(pdev, hd);
} else { } else {
idebus[0] = idebus[1] = NULL; idebus[0] = idebus[1] = NULL;

8
hw/ide/ahci.c
View File

@ -1896,14 +1896,6 @@ static void sysbus_ahci_register_types(void)
type_init(sysbus_ahci_register_types) type_init(sysbus_ahci_register_types)
int32_t ahci_get_num_ports(PCIDevice *dev)
{
AHCIPCIState *d = ICH9_AHCI(dev);
AHCIState *ahci = &d->ahci;
return ahci->ports;
}
void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd) void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd)
{ {
AHCIPCIState *d = ICH9_AHCI(dev); AHCIPCIState *d = ICH9_AHCI(dev);

6
hw/mips/boston.c
View File

@ -678,6 +678,7 @@ static void boston_mach_init(MachineState *machine)
MemoryRegion *sys_mem = get_system_memory(); MemoryRegion *sys_mem = get_system_memory();
XilinxPCIEHost *pcie2; XilinxPCIEHost *pcie2;
PCIDevice *pdev; PCIDevice *pdev;
AHCIPCIState *ich9;
DriveInfo *hd[6]; DriveInfo *hd[6];
Chardev *chr; Chardev *chr;
int fw_size, fit_err; int fw_size, fit_err;
@ -771,8 +772,9 @@ static void boston_mach_init(MachineState *machine)
pdev = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus, pdev = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus,
PCI_DEVFN(0, 0), TYPE_ICH9_AHCI); PCI_DEVFN(0, 0), TYPE_ICH9_AHCI);
g_assert(ARRAY_SIZE(hd) == ahci_get_num_ports(pdev)); ich9 = ICH9_AHCI(pdev);
ide_drive_get(hd, ahci_get_num_ports(pdev)); g_assert(ARRAY_SIZE(hd) == ich9->ahci.ports);
ide_drive_get(hd, ich9->ahci.ports);
ahci_ide_create_devs(pdev, hd); ahci_ide_create_devs(pdev, hd);
if (machine->firmware) { if (machine->firmware) {

1
include/hw/ide/ahci.h
View File

@ -52,7 +52,6 @@ typedef struct AHCIState {
} AHCIState; } AHCIState;
int32_t ahci_get_num_ports(PCIDevice *dev);
void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd);
#define TYPE_SYSBUS_AHCI "sysbus-ahci" #define TYPE_SYSBUS_AHCI "sysbus-ahci"