mirror of https://github.com/xemu-project/xemu.git
target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav7
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1513,17 +1513,16 @@ static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx,
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static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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MMUAccessType access_type, ARMMMUIdx mmu_idx,
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hwaddr *phys_ptr, int *prot,
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target_ulong *page_size,
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GetPhysAddrResult *result,
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ARMMMUFaultInfo *fi)
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{
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ARMCPU *cpu = env_archcpu(env);
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int n;
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bool is_user = regime_is_user(env, mmu_idx);
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*phys_ptr = address;
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*page_size = TARGET_PAGE_SIZE;
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*prot = 0;
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result->phys = address;
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result->page_size = TARGET_PAGE_SIZE;
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result->prot = 0;
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if (regime_translation_disabled(env, mmu_idx) ||
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m_is_ppb_region(env, address)) {
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@ -1535,7 +1534,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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* which always does a direct read using address_space_ldl(), rather
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* than going via this function, so we don't need to check that here.
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*/
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get_phys_addr_pmsav7_default(env, mmu_idx, address, prot);
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get_phys_addr_pmsav7_default(env, mmu_idx, address, &result->prot);
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} else { /* MPU enabled */
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for (n = (int)cpu->pmsav7_dregion - 1; n >= 0; n--) {
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/* region search */
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@ -1577,7 +1576,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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if (ranges_overlap(base, rmask,
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address & TARGET_PAGE_MASK,
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TARGET_PAGE_SIZE)) {
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*page_size = 1;
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result->page_size = 1;
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}
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continue;
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}
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@ -1615,7 +1614,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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continue;
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}
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if (rsize < TARGET_PAGE_BITS) {
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*page_size = 1 << rsize;
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result->page_size = 1 << rsize;
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}
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break;
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}
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@ -1626,7 +1625,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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fi->type = ARMFault_Background;
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return true;
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}
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get_phys_addr_pmsav7_default(env, mmu_idx, address, prot);
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get_phys_addr_pmsav7_default(env, mmu_idx, address, &result->prot);
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} else { /* a MPU hit! */
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uint32_t ap = extract32(env->pmsav7.dracr[n], 8, 3);
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uint32_t xn = extract32(env->pmsav7.dracr[n], 12, 1);
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@ -1643,16 +1642,16 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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case 5:
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break; /* no access */
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case 3:
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*prot |= PAGE_WRITE;
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result->prot |= PAGE_WRITE;
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/* fall through */
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case 2:
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case 6:
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*prot |= PAGE_READ | PAGE_EXEC;
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result->prot |= PAGE_READ | PAGE_EXEC;
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break;
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case 7:
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/* for v7M, same as 6; for R profile a reserved value */
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if (arm_feature(env, ARM_FEATURE_M)) {
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*prot |= PAGE_READ | PAGE_EXEC;
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result->prot |= PAGE_READ | PAGE_EXEC;
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break;
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}
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/* fall through */
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@ -1668,16 +1667,16 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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case 1:
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case 2:
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case 3:
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*prot |= PAGE_WRITE;
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result->prot |= PAGE_WRITE;
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/* fall through */
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case 5:
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case 6:
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*prot |= PAGE_READ | PAGE_EXEC;
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result->prot |= PAGE_READ | PAGE_EXEC;
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break;
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case 7:
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/* for v7M, same as 6; for R profile a reserved value */
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if (arm_feature(env, ARM_FEATURE_M)) {
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*prot |= PAGE_READ | PAGE_EXEC;
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result->prot |= PAGE_READ | PAGE_EXEC;
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break;
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}
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/* fall through */
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@ -1690,14 +1689,14 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
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/* execute never */
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if (xn) {
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*prot &= ~PAGE_EXEC;
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result->prot &= ~PAGE_EXEC;
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}
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}
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}
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fi->type = ARMFault_Permission;
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fi->level = 1;
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return !(*prot & (1 << access_type));
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return !(result->prot & (1 << access_type));
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}
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bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
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@ -2422,8 +2421,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
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} else if (arm_feature(env, ARM_FEATURE_V7)) {
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/* PMSAv7 */
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ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx,
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&result->phys, &result->prot,
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&result->page_size, fi);
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result, fi);
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} else {
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/* Pre-v7 MPU */
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ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx,
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