From e431cbff82d4bfa95c61b62be90bcb80678e577e Mon Sep 17 00:00:00 2001
From: Matt Borgerson <contact@mborgerson.com>
Date: Wed, 30 Dec 2020 03:12:33 -0700
Subject: [PATCH] nv2a: Fix compiler nits
---
hw/xbox/nv2a/pgraph.c | 37 ++++++++++++++++++++++---------------
hw/xbox/nv2a/psh.c | 4 ++--
hw/xbox/nv2a/swizzle.c | 2 +-
hw/xbox/nv2a/vsh.c | 8 +++++---
4 files changed, 30 insertions(+), 21 deletions(-)
diff --git a/hw/xbox/nv2a/pgraph.c b/hw/xbox/nv2a/pgraph.c
index 7f3d7a6988..aded949fb1 100644
--- a/hw/xbox/nv2a/pgraph.c
+++ b/hw/xbox/nv2a/pgraph.c
@@ -112,6 +112,7 @@ static const GLenum pgraph_blend_equation_map[] = {
GL_FUNC_ADD,
};
+/* FIXME
static const GLenum pgraph_blend_logicop_map[] = {
GL_CLEAR,
GL_AND,
@@ -130,6 +131,7 @@ static const GLenum pgraph_blend_logicop_map[] = {
GL_NAND,
GL_SET,
};
+*/
static const GLenum pgraph_cull_face_map[] = {
0,
@@ -498,9 +500,10 @@ void pgraph_write(void *opaque, hwaddr addr, uint64_t val, unsigned int size)
NV_PGRAPH_CHANNEL_CTX_POINTER_INST) << 4;
if (val & NV_PGRAPH_CHANNEL_CTX_TRIGGER_READ_IN) {
+#ifdef DEBUG_NV2A
unsigned pgraph_channel_id =
GET_MASK(pg->regs[NV_PGRAPH_CTX_USER], NV_PGRAPH_CTX_USER_CHID);
-
+#endif
NV2A_DPRINTF("PGRAPH: read channel %d context from %" HWADDR_PRIx "\n",
pgraph_channel_id, context_address);
@@ -3869,14 +3872,16 @@ static void pgraph_surface_access_callback(
assert(offset < e->size);
if (atomic_read(&e->draw_dirty)) {
- NV2A_XPRINTF(DBG_SURFACE_SYNC, "Surface accessed at %08lx+%lx\n",
- e->vram_addr, offset);
+ NV2A_XPRINTF(DBG_SURFACE_SYNC,
+ "Surface accessed at %" HWADDR_PRIx "+%" HWADDR_PRIx "\n",
+ e->vram_addr, offset);
pgraph_wait_for_surface_download(e);
}
if (write && !atomic_read(&e->upload_pending)) {
- NV2A_XPRINTF(DBG_SURFACE_SYNC, "Surface write at %08lx+%lx\n",
- e->vram_addr, offset);
+ NV2A_XPRINTF(DBG_SURFACE_SYNC,
+ "Surface write at %" HWADDR_PRIx "+%" HWADDR_PRIx "\n",
+ e->vram_addr, offset);
atomic_set(&e->upload_pending, true);
}
}
@@ -4012,11 +4017,12 @@ static void pgraph_download_surface_data(NV2AState *d,
uint8_t *buf = data + surface->vram_addr;
NV2A_XPRINTF(DBG_SURFACE_SYNC,
- "[GPU->RAM] %s (%s) surface @ %lx (w=%d,h=%d,p=%d,bpp=%d)\n",
- surface->color ? "COLOR" : "ZETA", surface->swizzle ? "sz" : "lin",
- surface->vram_addr, surface->width, surface->height,
- surface->pitch, surface->bytes_per_pixel
- );
+ "[GPU->RAM] %s (%s) surface @ %" HWADDR_PRIx
+ " (w=%d,h=%d,p=%d,bpp=%d)\n",
+ surface->color ? "COLOR" : "ZETA",
+ surface->swizzle ? "sz" : "lin", surface->vram_addr,
+ surface->width, surface->height, surface->pitch,
+ surface->bytes_per_pixel);
// Bind destination surface to framebuffer
glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
@@ -4112,11 +4118,12 @@ static void pgraph_upload_surface_data(
}
NV2A_XPRINTF(DBG_SURFACE_SYNC,
- "[RAM->GPU] %s (%s) surface @ %lx (w=%d,h=%d,p=%d,bpp=%d)\n",
- surface->color ? "COLOR" : "ZETA", surface->swizzle ? "sz" : "lin",
- surface->vram_addr, surface->width, surface->height,
- surface->pitch, surface->bytes_per_pixel
- );
+ "[RAM->GPU] %s (%s) surface @ %" HWADDR_PRIx
+ " (w=%d,h=%d,p=%d,bpp=%d)\n",
+ surface->color ? "COLOR" : "ZETA",
+ surface->swizzle ? "sz" : "lin", surface->vram_addr,
+ surface->width, surface->height, surface->pitch,
+ surface->bytes_per_pixel);
PGRAPHState *pg = &d->pgraph;
diff --git a/hw/xbox/nv2a/psh.c b/hw/xbox/nv2a/psh.c
index bc40eeb2b4..49243dc9bb 100644
--- a/hw/xbox/nv2a/psh.c
+++ b/hw/xbox/nv2a/psh.c
@@ -296,7 +296,7 @@ static QString* get_var(struct PixelShader *ps, int reg, bool is_dest)
qstring_get_str(ps->varF));
default:
assert(false);
- break;
+ return NULL;
}
}
@@ -865,7 +865,7 @@ static QString* psh_convert(struct PixelShader *ps)
assert(false);
break;
}
-
+
if (sampler_type != NULL) {
qstring_append_fmt(preflight, "uniform %s texSamp%d;\n", sampler_type, i);
diff --git a/hw/xbox/nv2a/swizzle.c b/hw/xbox/nv2a/swizzle.c
index 541ff9702d..4df1877033 100644
--- a/hw/xbox/nv2a/swizzle.c
+++ b/hw/xbox/nv2a/swizzle.c
@@ -49,7 +49,7 @@ static void generate_swizzle_masks(unsigned int width,
if (bit < depth) { z |= mask_bit; mask_bit <<= 1; done = false; }
bit <<= 1;
} while(!done);
- assert(x ^ y ^ z == (mask_bit - 1));
+ assert((x ^ y ^ z) == (mask_bit - 1));
*mask_x = x;
*mask_y = y;
*mask_z = z;
diff --git a/hw/xbox/nv2a/vsh.c b/hw/xbox/nv2a/vsh.c
index b7efc7abeb..ec71a713e4 100644
--- a/hw/xbox/nv2a/vsh.c
+++ b/hw/xbox/nv2a/vsh.c
@@ -149,6 +149,7 @@ typedef struct VshOpcodeParams {
bool C;
} VshOpcodeParams;
+#if 0
static const VshOpcodeParams ilu_opcode_params[] = {
/* ILU OP ParamA ParamB ParamC */
/* ILU_NOP */ { false, false, false }, // Dxbx note : Unused
@@ -160,6 +161,7 @@ static const VshOpcodeParams ilu_opcode_params[] = {
/* ILU_LOG */ { false, false, true },
/* ILU_LIT */ { false, false, true },
};
+#endif
static const VshOpcodeParams mac_opcode_params[] = {
/* MAC OP ParamA ParamB ParamC */
@@ -562,19 +564,19 @@ static const char* vsh_header =
"}\n"
"\n"
"#define MUL(dest, mask, src0, src1) dest.mask = _MUL(_in(src0), _in(src1)).mask\n"
- "vec4 _MUL(vec4 src0, vec4 src1)\n"
+ "vec4 _MUL(vec4 src0, vec4 src1)\n"
"{\n"
" return src0 * src1;\n"
"}\n"
"\n"
"#define ADD(dest, mask, src0, src1) dest.mask = _ADD(_in(src0), _in(src1)).mask\n"
- "vec4 _ADD(vec4 src0, vec4 src1)\n"
+ "vec4 _ADD(vec4 src0, vec4 src1)\n"
"{\n"
" return src0 + src1;\n"
"}\n"
"\n"
"#define MAD(dest, mask, src0, src1, src2) dest.mask = _MAD(_in(src0), _in(src1), _in(src2)).mask\n"
- "vec4 _MAD(vec4 src0, vec4 src1, vec4 src2)\n"
+ "vec4 _MAD(vec4 src0, vec4 src1, vec4 src2)\n"
"{\n"
" return src0 * src1 + src2;\n"
"}\n"