mirror of https://github.com/xemu-project/xemu.git
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
Thus, use cpu_env as the parameter, not TCG_AREG0 directly. Update all uses in the translators. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
parent
2015770593
commit
e1ccc05444
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@ -152,13 +152,13 @@ void alpha_translate_init(void)
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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for (i = 0; i < 31; i++) {
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for (i = 0; i < 31; i++) {
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cpu_std_ir[i] = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_std_ir[i] = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUAlphaState, ir[i]),
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offsetof(CPUAlphaState, ir[i]),
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greg_names[i]);
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greg_names[i]);
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}
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}
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for (i = 0; i < 31; i++) {
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for (i = 0; i < 31; i++) {
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cpu_fir[i] = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_fir[i] = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUAlphaState, fir[i]),
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offsetof(CPUAlphaState, fir[i]),
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freg_names[i]);
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freg_names[i]);
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}
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}
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@ -167,7 +167,7 @@ void alpha_translate_init(void)
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memcpy(cpu_pal_ir, cpu_std_ir, sizeof(cpu_pal_ir));
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memcpy(cpu_pal_ir, cpu_std_ir, sizeof(cpu_pal_ir));
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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int r = (i == 7 ? 25 : i + 8);
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int r = (i == 7 ? 25 : i + 8);
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cpu_pal_ir[r] = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_pal_ir[r] = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUAlphaState,
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offsetof(CPUAlphaState,
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shadow[i]),
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shadow[i]),
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shadow_names[i]);
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shadow_names[i]);
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@ -176,7 +176,7 @@ void alpha_translate_init(void)
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for (i = 0; i < ARRAY_SIZE(vars); ++i) {
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for (i = 0; i < ARRAY_SIZE(vars); ++i) {
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const GlobalVar *v = &vars[i];
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const GlobalVar *v = &vars[i];
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*v->var = tcg_global_mem_new_i64(TCG_AREG0, v->ofs, v->name);
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*v->var = tcg_global_mem_new_i64(cpu_env, v->ofs, v->name);
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}
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}
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}
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}
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@ -86,16 +86,16 @@ void a64_translate_init(void)
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{
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{
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int i;
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int i;
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cpu_pc = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_pc = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUARMState, pc),
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offsetof(CPUARMState, pc),
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"pc");
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"pc");
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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cpu_X[i] = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_X[i] = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUARMState, xregs[i]),
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offsetof(CPUARMState, xregs[i]),
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regnames[i]);
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regnames[i]);
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}
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}
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cpu_exclusive_high = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_exclusive_high = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUARMState, exclusive_high), "exclusive_high");
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offsetof(CPUARMState, exclusive_high), "exclusive_high");
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}
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}
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@ -86,23 +86,23 @@ void arm_translate_init(void)
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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for (i = 0; i < 16; i++) {
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for (i = 0; i < 16; i++) {
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cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
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cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
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offsetof(CPUARMState, regs[i]),
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offsetof(CPUARMState, regs[i]),
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regnames[i]);
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regnames[i]);
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}
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}
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cpu_CF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, CF), "CF");
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cpu_CF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, CF), "CF");
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cpu_NF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, NF), "NF");
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cpu_NF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, NF), "NF");
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cpu_VF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, VF), "VF");
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cpu_VF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, VF), "VF");
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cpu_ZF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, ZF), "ZF");
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cpu_ZF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, ZF), "ZF");
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cpu_exclusive_addr = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_exclusive_addr = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUARMState, exclusive_addr), "exclusive_addr");
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offsetof(CPUARMState, exclusive_addr), "exclusive_addr");
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cpu_exclusive_val = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_exclusive_val = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUARMState, exclusive_val), "exclusive_val");
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offsetof(CPUARMState, exclusive_val), "exclusive_val");
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#ifdef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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cpu_exclusive_test = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_exclusive_test = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUARMState, exclusive_test), "exclusive_test");
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offsetof(CPUARMState, exclusive_test), "exclusive_test");
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cpu_exclusive_info = tcg_global_mem_new_i32(TCG_AREG0,
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cpu_exclusive_info = tcg_global_mem_new_i32(cpu_env,
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offsetof(CPUARMState, exclusive_info), "exclusive_info");
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offsetof(CPUARMState, exclusive_info), "exclusive_info");
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#endif
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#endif
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@ -3364,41 +3364,41 @@ void cris_initialize_tcg(void)
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int i;
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int i;
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cc_x = tcg_global_mem_new(TCG_AREG0,
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cc_x = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_x), "cc_x");
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offsetof(CPUCRISState, cc_x), "cc_x");
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cc_src = tcg_global_mem_new(TCG_AREG0,
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cc_src = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_src), "cc_src");
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offsetof(CPUCRISState, cc_src), "cc_src");
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cc_dest = tcg_global_mem_new(TCG_AREG0,
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cc_dest = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_dest),
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offsetof(CPUCRISState, cc_dest),
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"cc_dest");
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"cc_dest");
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cc_result = tcg_global_mem_new(TCG_AREG0,
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cc_result = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_result),
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offsetof(CPUCRISState, cc_result),
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"cc_result");
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"cc_result");
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cc_op = tcg_global_mem_new(TCG_AREG0,
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cc_op = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_op), "cc_op");
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offsetof(CPUCRISState, cc_op), "cc_op");
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cc_size = tcg_global_mem_new(TCG_AREG0,
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cc_size = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_size),
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offsetof(CPUCRISState, cc_size),
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"cc_size");
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"cc_size");
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cc_mask = tcg_global_mem_new(TCG_AREG0,
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cc_mask = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_mask),
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offsetof(CPUCRISState, cc_mask),
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"cc_mask");
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"cc_mask");
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env_pc = tcg_global_mem_new(TCG_AREG0,
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env_pc = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, pc),
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offsetof(CPUCRISState, pc),
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"pc");
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"pc");
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env_btarget = tcg_global_mem_new(TCG_AREG0,
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env_btarget = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, btarget),
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offsetof(CPUCRISState, btarget),
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"btarget");
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"btarget");
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env_btaken = tcg_global_mem_new(TCG_AREG0,
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env_btaken = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, btaken),
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offsetof(CPUCRISState, btaken),
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"btaken");
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"btaken");
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for (i = 0; i < 16; i++) {
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for (i = 0; i < 16; i++) {
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cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_R[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, regs[i]),
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offsetof(CPUCRISState, regs[i]),
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regnames[i]);
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regnames[i]);
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}
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}
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for (i = 0; i < 16; i++) {
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for (i = 0; i < 16; i++) {
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cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_PR[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, pregs[i]),
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offsetof(CPUCRISState, pregs[i]),
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pregnames[i]);
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pregnames[i]);
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}
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}
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@ -1250,41 +1250,41 @@ void cris_initialize_crisv10_tcg(void)
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int i;
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int i;
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cc_x = tcg_global_mem_new(TCG_AREG0,
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cc_x = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_x), "cc_x");
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offsetof(CPUCRISState, cc_x), "cc_x");
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cc_src = tcg_global_mem_new(TCG_AREG0,
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cc_src = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_src), "cc_src");
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offsetof(CPUCRISState, cc_src), "cc_src");
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cc_dest = tcg_global_mem_new(TCG_AREG0,
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cc_dest = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_dest),
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offsetof(CPUCRISState, cc_dest),
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"cc_dest");
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"cc_dest");
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cc_result = tcg_global_mem_new(TCG_AREG0,
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cc_result = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_result),
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offsetof(CPUCRISState, cc_result),
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"cc_result");
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"cc_result");
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cc_op = tcg_global_mem_new(TCG_AREG0,
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cc_op = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_op), "cc_op");
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offsetof(CPUCRISState, cc_op), "cc_op");
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cc_size = tcg_global_mem_new(TCG_AREG0,
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cc_size = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_size),
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offsetof(CPUCRISState, cc_size),
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"cc_size");
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"cc_size");
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cc_mask = tcg_global_mem_new(TCG_AREG0,
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cc_mask = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, cc_mask),
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offsetof(CPUCRISState, cc_mask),
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"cc_mask");
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"cc_mask");
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env_pc = tcg_global_mem_new(TCG_AREG0,
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env_pc = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, pc),
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offsetof(CPUCRISState, pc),
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"pc");
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"pc");
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env_btarget = tcg_global_mem_new(TCG_AREG0,
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env_btarget = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, btarget),
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offsetof(CPUCRISState, btarget),
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"btarget");
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"btarget");
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env_btaken = tcg_global_mem_new(TCG_AREG0,
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env_btaken = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, btaken),
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offsetof(CPUCRISState, btaken),
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"btaken");
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"btaken");
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for (i = 0; i < 16; i++) {
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for (i = 0; i < 16; i++) {
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cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_R[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, regs[i]),
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offsetof(CPUCRISState, regs[i]),
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regnames_v10[i]);
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regnames_v10[i]);
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}
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}
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for (i = 0; i < 16; i++) {
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for (i = 0; i < 16; i++) {
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cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_PR[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUCRISState, pregs[i]),
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offsetof(CPUCRISState, pregs[i]),
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pregnames_v10[i]);
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pregnames_v10[i]);
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}
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}
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@ -7860,17 +7860,17 @@ void tcg_x86_init(void)
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int i;
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int i;
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0,
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cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
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offsetof(CPUX86State, cc_op), "cc_op");
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offsetof(CPUX86State, cc_op), "cc_op");
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cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_dst),
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cpu_cc_dst = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_dst),
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"cc_dst");
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"cc_dst");
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cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_src),
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cpu_cc_src = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_src),
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"cc_src");
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"cc_src");
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cpu_cc_src2 = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_src2),
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cpu_cc_src2 = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_src2),
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"cc_src2");
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"cc_src2");
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for (i = 0; i < CPU_NB_REGS; ++i) {
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for (i = 0; i < CPU_NB_REGS; ++i) {
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cpu_regs[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_regs[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUX86State, regs[i]),
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offsetof(CPUX86State, regs[i]),
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reg_names[i]);
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reg_names[i]);
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}
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}
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@ -1193,48 +1193,48 @@ void lm32_translate_init(void)
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
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for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
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cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_R[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, regs[i]),
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offsetof(CPULM32State, regs[i]),
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regnames[i]);
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regnames[i]);
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}
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}
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for (i = 0; i < ARRAY_SIZE(cpu_bp); i++) {
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for (i = 0; i < ARRAY_SIZE(cpu_bp); i++) {
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cpu_bp[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_bp[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, bp[i]),
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offsetof(CPULM32State, bp[i]),
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regnames[32+i]);
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regnames[32+i]);
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}
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}
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for (i = 0; i < ARRAY_SIZE(cpu_wp); i++) {
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for (i = 0; i < ARRAY_SIZE(cpu_wp); i++) {
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cpu_wp[i] = tcg_global_mem_new(TCG_AREG0,
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cpu_wp[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, wp[i]),
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offsetof(CPULM32State, wp[i]),
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regnames[36+i]);
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regnames[36+i]);
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}
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}
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cpu_pc = tcg_global_mem_new(TCG_AREG0,
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cpu_pc = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, pc),
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offsetof(CPULM32State, pc),
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"pc");
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"pc");
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cpu_ie = tcg_global_mem_new(TCG_AREG0,
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cpu_ie = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, ie),
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offsetof(CPULM32State, ie),
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"ie");
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"ie");
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cpu_icc = tcg_global_mem_new(TCG_AREG0,
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cpu_icc = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, icc),
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offsetof(CPULM32State, icc),
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"icc");
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"icc");
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cpu_dcc = tcg_global_mem_new(TCG_AREG0,
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cpu_dcc = tcg_global_mem_new(cpu_env,
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offsetof(CPULM32State, dcc),
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offsetof(CPULM32State, dcc),
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"dcc");
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"dcc");
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cpu_cc = tcg_global_mem_new(TCG_AREG0,
|
cpu_cc = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPULM32State, cc),
|
offsetof(CPULM32State, cc),
|
||||||
"cc");
|
"cc");
|
||||||
cpu_cfg = tcg_global_mem_new(TCG_AREG0,
|
cpu_cfg = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPULM32State, cfg),
|
offsetof(CPULM32State, cfg),
|
||||||
"cfg");
|
"cfg");
|
||||||
cpu_eba = tcg_global_mem_new(TCG_AREG0,
|
cpu_eba = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPULM32State, eba),
|
offsetof(CPULM32State, eba),
|
||||||
"eba");
|
"eba");
|
||||||
cpu_dc = tcg_global_mem_new(TCG_AREG0,
|
cpu_dc = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPULM32State, dc),
|
offsetof(CPULM32State, dc),
|
||||||
"dc");
|
"dc");
|
||||||
cpu_deba = tcg_global_mem_new(TCG_AREG0,
|
cpu_deba = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPULM32State, deba),
|
offsetof(CPULM32State, deba),
|
||||||
"deba");
|
"deba");
|
||||||
}
|
}
|
||||||
|
|
|
@ -76,48 +76,52 @@ void m68k_tcg_init(void)
|
||||||
char *p;
|
char *p;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
#define DEFO32(name, offset) QREG_##name = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUM68KState, offset), #name);
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
#define DEFO64(name, offset) QREG_##name = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUM68KState, offset), #name);
|
|
||||||
|
#define DEFO32(name, offset) \
|
||||||
|
QREG_##name = tcg_global_mem_new_i32(cpu_env, \
|
||||||
|
offsetof(CPUM68KState, offset), #name);
|
||||||
|
#define DEFO64(name, offset) \
|
||||||
|
QREG_##name = tcg_global_mem_new_i64(cpu_env, \
|
||||||
|
offsetof(CPUM68KState, offset), #name);
|
||||||
#define DEFF64(name, offset) DEFO64(name, offset)
|
#define DEFF64(name, offset) DEFO64(name, offset)
|
||||||
#include "qregs.def"
|
#include "qregs.def"
|
||||||
#undef DEFO32
|
#undef DEFO32
|
||||||
#undef DEFO64
|
#undef DEFO64
|
||||||
#undef DEFF64
|
#undef DEFF64
|
||||||
|
|
||||||
cpu_halted = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_halted = tcg_global_mem_new_i32(cpu_env,
|
||||||
-offsetof(M68kCPU, env) +
|
-offsetof(M68kCPU, env) +
|
||||||
offsetof(CPUState, halted), "HALTED");
|
offsetof(CPUState, halted), "HALTED");
|
||||||
cpu_exception_index = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_exception_index = tcg_global_mem_new_i32(cpu_env,
|
||||||
-offsetof(M68kCPU, env) +
|
-offsetof(M68kCPU, env) +
|
||||||
offsetof(CPUState, exception_index),
|
offsetof(CPUState, exception_index),
|
||||||
"EXCEPTION");
|
"EXCEPTION");
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
|
||||||
|
|
||||||
p = cpu_reg_names;
|
p = cpu_reg_names;
|
||||||
for (i = 0; i < 8; i++) {
|
for (i = 0; i < 8; i++) {
|
||||||
sprintf(p, "D%d", i);
|
sprintf(p, "D%d", i);
|
||||||
cpu_dregs[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_dregs[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUM68KState, dregs[i]), p);
|
offsetof(CPUM68KState, dregs[i]), p);
|
||||||
p += 3;
|
p += 3;
|
||||||
sprintf(p, "A%d", i);
|
sprintf(p, "A%d", i);
|
||||||
cpu_aregs[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_aregs[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUM68KState, aregs[i]), p);
|
offsetof(CPUM68KState, aregs[i]), p);
|
||||||
p += 3;
|
p += 3;
|
||||||
sprintf(p, "F%d", i);
|
sprintf(p, "F%d", i);
|
||||||
cpu_fregs[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_fregs[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUM68KState, fregs[i]), p);
|
offsetof(CPUM68KState, fregs[i]), p);
|
||||||
p += 3;
|
p += 3;
|
||||||
}
|
}
|
||||||
for (i = 0; i < 4; i++) {
|
for (i = 0; i < 4; i++) {
|
||||||
sprintf(p, "ACC%d", i);
|
sprintf(p, "ACC%d", i);
|
||||||
cpu_macc[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_macc[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUM68KState, macc[i]), p);
|
offsetof(CPUM68KState, macc[i]), p);
|
||||||
p += 5;
|
p += 5;
|
||||||
}
|
}
|
||||||
|
|
||||||
NULL_QREG = tcg_global_mem_new(TCG_AREG0, -4, "NULL");
|
NULL_QREG = tcg_global_mem_new(cpu_env, -4, "NULL");
|
||||||
store_dummy = tcg_global_mem_new(TCG_AREG0, -8, "NULL");
|
store_dummy = tcg_global_mem_new(cpu_env, -8, "NULL");
|
||||||
}
|
}
|
||||||
|
|
||||||
/* internal defines */
|
/* internal defines */
|
||||||
|
|
|
@ -1870,34 +1870,34 @@ void mb_tcg_init(void)
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
|
|
||||||
env_debug = tcg_global_mem_new(TCG_AREG0,
|
env_debug = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, debug),
|
offsetof(CPUMBState, debug),
|
||||||
"debug0");
|
"debug0");
|
||||||
env_iflags = tcg_global_mem_new(TCG_AREG0,
|
env_iflags = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, iflags),
|
offsetof(CPUMBState, iflags),
|
||||||
"iflags");
|
"iflags");
|
||||||
env_imm = tcg_global_mem_new(TCG_AREG0,
|
env_imm = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, imm),
|
offsetof(CPUMBState, imm),
|
||||||
"imm");
|
"imm");
|
||||||
env_btarget = tcg_global_mem_new(TCG_AREG0,
|
env_btarget = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, btarget),
|
offsetof(CPUMBState, btarget),
|
||||||
"btarget");
|
"btarget");
|
||||||
env_btaken = tcg_global_mem_new(TCG_AREG0,
|
env_btaken = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, btaken),
|
offsetof(CPUMBState, btaken),
|
||||||
"btaken");
|
"btaken");
|
||||||
env_res_addr = tcg_global_mem_new(TCG_AREG0,
|
env_res_addr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, res_addr),
|
offsetof(CPUMBState, res_addr),
|
||||||
"res_addr");
|
"res_addr");
|
||||||
env_res_val = tcg_global_mem_new(TCG_AREG0,
|
env_res_val = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, res_val),
|
offsetof(CPUMBState, res_val),
|
||||||
"res_val");
|
"res_val");
|
||||||
for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
|
for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
|
||||||
cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_R[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, regs[i]),
|
offsetof(CPUMBState, regs[i]),
|
||||||
regnames[i]);
|
regnames[i]);
|
||||||
}
|
}
|
||||||
for (i = 0; i < ARRAY_SIZE(cpu_SR); i++) {
|
for (i = 0; i < ARRAY_SIZE(cpu_SR); i++) {
|
||||||
cpu_SR[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_SR[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMBState, sregs[i]),
|
offsetof(CPUMBState, sregs[i]),
|
||||||
special_regnames[i]);
|
special_regnames[i]);
|
||||||
}
|
}
|
||||||
|
|
|
@ -19829,48 +19829,49 @@ void mips_tcg_init(void)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
|
|
||||||
TCGV_UNUSED(cpu_gpr[0]);
|
TCGV_UNUSED(cpu_gpr[0]);
|
||||||
for (i = 1; i < 32; i++)
|
for (i = 1; i < 32; i++)
|
||||||
cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_gpr[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_tc.gpr[i]),
|
offsetof(CPUMIPSState, active_tc.gpr[i]),
|
||||||
regnames[i]);
|
regnames[i]);
|
||||||
|
|
||||||
for (i = 0; i < 32; i++) {
|
for (i = 0; i < 32; i++) {
|
||||||
int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
|
int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
|
||||||
msa_wr_d[i * 2] =
|
msa_wr_d[i * 2] =
|
||||||
tcg_global_mem_new_i64(TCG_AREG0, off, msaregnames[i * 2]);
|
tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]);
|
||||||
/* The scalar floating-point unit (FPU) registers are mapped on
|
/* The scalar floating-point unit (FPU) registers are mapped on
|
||||||
* the MSA vector registers. */
|
* the MSA vector registers. */
|
||||||
fpu_f64[i] = msa_wr_d[i * 2];
|
fpu_f64[i] = msa_wr_d[i * 2];
|
||||||
off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]);
|
off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]);
|
||||||
msa_wr_d[i * 2 + 1] =
|
msa_wr_d[i * 2 + 1] =
|
||||||
tcg_global_mem_new_i64(TCG_AREG0, off, msaregnames[i * 2 + 1]);
|
tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]);
|
||||||
}
|
}
|
||||||
|
|
||||||
cpu_PC = tcg_global_mem_new(TCG_AREG0,
|
cpu_PC = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_tc.PC), "PC");
|
offsetof(CPUMIPSState, active_tc.PC), "PC");
|
||||||
for (i = 0; i < MIPS_DSP_ACC; i++) {
|
for (i = 0; i < MIPS_DSP_ACC; i++) {
|
||||||
cpu_HI[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_HI[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_tc.HI[i]),
|
offsetof(CPUMIPSState, active_tc.HI[i]),
|
||||||
regnames_HI[i]);
|
regnames_HI[i]);
|
||||||
cpu_LO[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_LO[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_tc.LO[i]),
|
offsetof(CPUMIPSState, active_tc.LO[i]),
|
||||||
regnames_LO[i]);
|
regnames_LO[i]);
|
||||||
}
|
}
|
||||||
cpu_dspctrl = tcg_global_mem_new(TCG_AREG0,
|
cpu_dspctrl = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_tc.DSPControl),
|
offsetof(CPUMIPSState, active_tc.DSPControl),
|
||||||
"DSPControl");
|
"DSPControl");
|
||||||
bcond = tcg_global_mem_new(TCG_AREG0,
|
bcond = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, bcond), "bcond");
|
offsetof(CPUMIPSState, bcond), "bcond");
|
||||||
btarget = tcg_global_mem_new(TCG_AREG0,
|
btarget = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUMIPSState, btarget), "btarget");
|
offsetof(CPUMIPSState, btarget), "btarget");
|
||||||
hflags = tcg_global_mem_new_i32(TCG_AREG0,
|
hflags = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMIPSState, hflags), "hflags");
|
offsetof(CPUMIPSState, hflags), "hflags");
|
||||||
|
|
||||||
fpu_fcr0 = tcg_global_mem_new_i32(TCG_AREG0,
|
fpu_fcr0 = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_fpu.fcr0),
|
offsetof(CPUMIPSState, active_fpu.fcr0),
|
||||||
"fcr0");
|
"fcr0");
|
||||||
fpu_fcr31 = tcg_global_mem_new_i32(TCG_AREG0,
|
fpu_fcr31 = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMIPSState, active_fpu.fcr31),
|
offsetof(CPUMIPSState, active_fpu.fcr31),
|
||||||
"fcr31");
|
"fcr31");
|
||||||
|
|
||||||
|
|
|
@ -106,16 +106,16 @@ void moxie_translate_init(void)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_pc = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMoxieState, pc), "$pc");
|
offsetof(CPUMoxieState, pc), "$pc");
|
||||||
for (i = 0; i < 16; i++)
|
for (i = 0; i < 16; i++)
|
||||||
cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMoxieState, gregs[i]),
|
offsetof(CPUMoxieState, gregs[i]),
|
||||||
gregnames[i]);
|
gregnames[i]);
|
||||||
|
|
||||||
cc_a = tcg_global_mem_new_i32(TCG_AREG0,
|
cc_a = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMoxieState, cc_a), "cc_a");
|
offsetof(CPUMoxieState, cc_a), "cc_a");
|
||||||
cc_b = tcg_global_mem_new_i32(TCG_AREG0,
|
cc_b = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUMoxieState, cc_b), "cc_b");
|
offsetof(CPUMoxieState, cc_b), "cc_b");
|
||||||
|
|
||||||
done_init = 1;
|
done_init = 1;
|
||||||
|
|
|
@ -78,39 +78,39 @@ void openrisc_translate_init(void)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
cpu_sr = tcg_global_mem_new(TCG_AREG0,
|
cpu_sr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, sr), "sr");
|
offsetof(CPUOpenRISCState, sr), "sr");
|
||||||
env_flags = tcg_global_mem_new_i32(TCG_AREG0,
|
env_flags = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, flags),
|
offsetof(CPUOpenRISCState, flags),
|
||||||
"flags");
|
"flags");
|
||||||
cpu_pc = tcg_global_mem_new(TCG_AREG0,
|
cpu_pc = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, pc), "pc");
|
offsetof(CPUOpenRISCState, pc), "pc");
|
||||||
cpu_npc = tcg_global_mem_new(TCG_AREG0,
|
cpu_npc = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, npc), "npc");
|
offsetof(CPUOpenRISCState, npc), "npc");
|
||||||
cpu_ppc = tcg_global_mem_new(TCG_AREG0,
|
cpu_ppc = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, ppc), "ppc");
|
offsetof(CPUOpenRISCState, ppc), "ppc");
|
||||||
jmp_pc = tcg_global_mem_new(TCG_AREG0,
|
jmp_pc = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, jmp_pc), "jmp_pc");
|
offsetof(CPUOpenRISCState, jmp_pc), "jmp_pc");
|
||||||
env_btaken = tcg_global_mem_new_i32(TCG_AREG0,
|
env_btaken = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, btaken),
|
offsetof(CPUOpenRISCState, btaken),
|
||||||
"btaken");
|
"btaken");
|
||||||
fpcsr = tcg_global_mem_new_i32(TCG_AREG0,
|
fpcsr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, fpcsr),
|
offsetof(CPUOpenRISCState, fpcsr),
|
||||||
"fpcsr");
|
"fpcsr");
|
||||||
machi = tcg_global_mem_new(TCG_AREG0,
|
machi = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, machi),
|
offsetof(CPUOpenRISCState, machi),
|
||||||
"machi");
|
"machi");
|
||||||
maclo = tcg_global_mem_new(TCG_AREG0,
|
maclo = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, maclo),
|
offsetof(CPUOpenRISCState, maclo),
|
||||||
"maclo");
|
"maclo");
|
||||||
fpmaddhi = tcg_global_mem_new(TCG_AREG0,
|
fpmaddhi = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, fpmaddhi),
|
offsetof(CPUOpenRISCState, fpmaddhi),
|
||||||
"fpmaddhi");
|
"fpmaddhi");
|
||||||
fpmaddlo = tcg_global_mem_new(TCG_AREG0,
|
fpmaddlo = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, fpmaddlo),
|
offsetof(CPUOpenRISCState, fpmaddlo),
|
||||||
"fpmaddlo");
|
"fpmaddlo");
|
||||||
for (i = 0; i < 32; i++) {
|
for (i = 0; i < 32; i++) {
|
||||||
cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_R[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUOpenRISCState, gpr[i]),
|
offsetof(CPUOpenRISCState, gpr[i]),
|
||||||
regnames[i]);
|
regnames[i]);
|
||||||
}
|
}
|
||||||
|
|
|
@ -93,7 +93,7 @@ void ppc_translate_init(void)
|
||||||
|
|
||||||
for (i = 0; i < 8; i++) {
|
for (i = 0; i < 8; i++) {
|
||||||
snprintf(p, cpu_reg_names_size, "crf%d", i);
|
snprintf(p, cpu_reg_names_size, "crf%d", i);
|
||||||
cpu_crf[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_crf[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUPPCState, crf[i]), p);
|
offsetof(CPUPPCState, crf[i]), p);
|
||||||
p += 5;
|
p += 5;
|
||||||
cpu_reg_names_size -= 5;
|
cpu_reg_names_size -= 5;
|
||||||
|
@ -101,28 +101,28 @@ void ppc_translate_init(void)
|
||||||
|
|
||||||
for (i = 0; i < 32; i++) {
|
for (i = 0; i < 32; i++) {
|
||||||
snprintf(p, cpu_reg_names_size, "r%d", i);
|
snprintf(p, cpu_reg_names_size, "r%d", i);
|
||||||
cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_gpr[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, gpr[i]), p);
|
offsetof(CPUPPCState, gpr[i]), p);
|
||||||
p += (i < 10) ? 3 : 4;
|
p += (i < 10) ? 3 : 4;
|
||||||
cpu_reg_names_size -= (i < 10) ? 3 : 4;
|
cpu_reg_names_size -= (i < 10) ? 3 : 4;
|
||||||
snprintf(p, cpu_reg_names_size, "r%dH", i);
|
snprintf(p, cpu_reg_names_size, "r%dH", i);
|
||||||
cpu_gprh[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_gprh[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, gprh[i]), p);
|
offsetof(CPUPPCState, gprh[i]), p);
|
||||||
p += (i < 10) ? 4 : 5;
|
p += (i < 10) ? 4 : 5;
|
||||||
cpu_reg_names_size -= (i < 10) ? 4 : 5;
|
cpu_reg_names_size -= (i < 10) ? 4 : 5;
|
||||||
|
|
||||||
snprintf(p, cpu_reg_names_size, "fp%d", i);
|
snprintf(p, cpu_reg_names_size, "fp%d", i);
|
||||||
cpu_fpr[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUPPCState, fpr[i]), p);
|
offsetof(CPUPPCState, fpr[i]), p);
|
||||||
p += (i < 10) ? 4 : 5;
|
p += (i < 10) ? 4 : 5;
|
||||||
cpu_reg_names_size -= (i < 10) ? 4 : 5;
|
cpu_reg_names_size -= (i < 10) ? 4 : 5;
|
||||||
|
|
||||||
snprintf(p, cpu_reg_names_size, "avr%dH", i);
|
snprintf(p, cpu_reg_names_size, "avr%dH", i);
|
||||||
#ifdef HOST_WORDS_BIGENDIAN
|
#ifdef HOST_WORDS_BIGENDIAN
|
||||||
cpu_avrh[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_avrh[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUPPCState, avr[i].u64[0]), p);
|
offsetof(CPUPPCState, avr[i].u64[0]), p);
|
||||||
#else
|
#else
|
||||||
cpu_avrh[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_avrh[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUPPCState, avr[i].u64[1]), p);
|
offsetof(CPUPPCState, avr[i].u64[1]), p);
|
||||||
#endif
|
#endif
|
||||||
p += (i < 10) ? 6 : 7;
|
p += (i < 10) ? 6 : 7;
|
||||||
|
@ -130,55 +130,55 @@ void ppc_translate_init(void)
|
||||||
|
|
||||||
snprintf(p, cpu_reg_names_size, "avr%dL", i);
|
snprintf(p, cpu_reg_names_size, "avr%dL", i);
|
||||||
#ifdef HOST_WORDS_BIGENDIAN
|
#ifdef HOST_WORDS_BIGENDIAN
|
||||||
cpu_avrl[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_avrl[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUPPCState, avr[i].u64[1]), p);
|
offsetof(CPUPPCState, avr[i].u64[1]), p);
|
||||||
#else
|
#else
|
||||||
cpu_avrl[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_avrl[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUPPCState, avr[i].u64[0]), p);
|
offsetof(CPUPPCState, avr[i].u64[0]), p);
|
||||||
#endif
|
#endif
|
||||||
p += (i < 10) ? 6 : 7;
|
p += (i < 10) ? 6 : 7;
|
||||||
cpu_reg_names_size -= (i < 10) ? 6 : 7;
|
cpu_reg_names_size -= (i < 10) ? 6 : 7;
|
||||||
snprintf(p, cpu_reg_names_size, "vsr%d", i);
|
snprintf(p, cpu_reg_names_size, "vsr%d", i);
|
||||||
cpu_vsr[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_vsr[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUPPCState, vsr[i]), p);
|
offsetof(CPUPPCState, vsr[i]), p);
|
||||||
p += (i < 10) ? 5 : 6;
|
p += (i < 10) ? 5 : 6;
|
||||||
cpu_reg_names_size -= (i < 10) ? 5 : 6;
|
cpu_reg_names_size -= (i < 10) ? 5 : 6;
|
||||||
}
|
}
|
||||||
|
|
||||||
cpu_nip = tcg_global_mem_new(TCG_AREG0,
|
cpu_nip = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, nip), "nip");
|
offsetof(CPUPPCState, nip), "nip");
|
||||||
|
|
||||||
cpu_msr = tcg_global_mem_new(TCG_AREG0,
|
cpu_msr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, msr), "msr");
|
offsetof(CPUPPCState, msr), "msr");
|
||||||
|
|
||||||
cpu_ctr = tcg_global_mem_new(TCG_AREG0,
|
cpu_ctr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, ctr), "ctr");
|
offsetof(CPUPPCState, ctr), "ctr");
|
||||||
|
|
||||||
cpu_lr = tcg_global_mem_new(TCG_AREG0,
|
cpu_lr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, lr), "lr");
|
offsetof(CPUPPCState, lr), "lr");
|
||||||
|
|
||||||
#if defined(TARGET_PPC64)
|
#if defined(TARGET_PPC64)
|
||||||
cpu_cfar = tcg_global_mem_new(TCG_AREG0,
|
cpu_cfar = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, cfar), "cfar");
|
offsetof(CPUPPCState, cfar), "cfar");
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
cpu_xer = tcg_global_mem_new(TCG_AREG0,
|
cpu_xer = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, xer), "xer");
|
offsetof(CPUPPCState, xer), "xer");
|
||||||
cpu_so = tcg_global_mem_new(TCG_AREG0,
|
cpu_so = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, so), "SO");
|
offsetof(CPUPPCState, so), "SO");
|
||||||
cpu_ov = tcg_global_mem_new(TCG_AREG0,
|
cpu_ov = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, ov), "OV");
|
offsetof(CPUPPCState, ov), "OV");
|
||||||
cpu_ca = tcg_global_mem_new(TCG_AREG0,
|
cpu_ca = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, ca), "CA");
|
offsetof(CPUPPCState, ca), "CA");
|
||||||
|
|
||||||
cpu_reserve = tcg_global_mem_new(TCG_AREG0,
|
cpu_reserve = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, reserve_addr),
|
offsetof(CPUPPCState, reserve_addr),
|
||||||
"reserve_addr");
|
"reserve_addr");
|
||||||
|
|
||||||
cpu_fpscr = tcg_global_mem_new(TCG_AREG0,
|
cpu_fpscr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUPPCState, fpscr), "fpscr");
|
offsetof(CPUPPCState, fpscr), "fpscr");
|
||||||
|
|
||||||
cpu_access_type = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_access_type = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUPPCState, access_type), "access_type");
|
offsetof(CPUPPCState, access_type), "access_type");
|
||||||
|
|
||||||
done_init = 1;
|
done_init = 1;
|
||||||
|
|
|
@ -168,35 +168,35 @@ void s390x_translate_init(void)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
psw_addr = tcg_global_mem_new_i64(TCG_AREG0,
|
psw_addr = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUS390XState, psw.addr),
|
offsetof(CPUS390XState, psw.addr),
|
||||||
"psw_addr");
|
"psw_addr");
|
||||||
psw_mask = tcg_global_mem_new_i64(TCG_AREG0,
|
psw_mask = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUS390XState, psw.mask),
|
offsetof(CPUS390XState, psw.mask),
|
||||||
"psw_mask");
|
"psw_mask");
|
||||||
gbea = tcg_global_mem_new_i64(TCG_AREG0,
|
gbea = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUS390XState, gbea),
|
offsetof(CPUS390XState, gbea),
|
||||||
"gbea");
|
"gbea");
|
||||||
|
|
||||||
cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUS390XState, cc_op),
|
cc_op = tcg_global_mem_new_i32(cpu_env, offsetof(CPUS390XState, cc_op),
|
||||||
"cc_op");
|
"cc_op");
|
||||||
cc_src = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUS390XState, cc_src),
|
cc_src = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_src),
|
||||||
"cc_src");
|
"cc_src");
|
||||||
cc_dst = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUS390XState, cc_dst),
|
cc_dst = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_dst),
|
||||||
"cc_dst");
|
"cc_dst");
|
||||||
cc_vr = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUS390XState, cc_vr),
|
cc_vr = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_vr),
|
||||||
"cc_vr");
|
"cc_vr");
|
||||||
|
|
||||||
for (i = 0; i < 16; i++) {
|
for (i = 0; i < 16; i++) {
|
||||||
snprintf(cpu_reg_names[i], sizeof(cpu_reg_names[0]), "r%d", i);
|
snprintf(cpu_reg_names[i], sizeof(cpu_reg_names[0]), "r%d", i);
|
||||||
regs[i] = tcg_global_mem_new(TCG_AREG0,
|
regs[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUS390XState, regs[i]),
|
offsetof(CPUS390XState, regs[i]),
|
||||||
cpu_reg_names[i]);
|
cpu_reg_names[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < 16; i++) {
|
for (i = 0; i < 16; i++) {
|
||||||
snprintf(cpu_reg_names[i + 16], sizeof(cpu_reg_names[0]), "f%d", i);
|
snprintf(cpu_reg_names[i + 16], sizeof(cpu_reg_names[0]), "f%d", i);
|
||||||
fregs[i] = tcg_global_mem_new(TCG_AREG0,
|
fregs[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUS390XState, vregs[i][0].d),
|
offsetof(CPUS390XState, vregs[i][0].d),
|
||||||
cpu_reg_names[i + 16]);
|
cpu_reg_names[i + 16]);
|
||||||
}
|
}
|
||||||
|
|
|
@ -102,53 +102,53 @@ void sh4_translate_init(void)
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
|
|
||||||
for (i = 0; i < 24; i++)
|
for (i = 0; i < 24; i++)
|
||||||
cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, gregs[i]),
|
offsetof(CPUSH4State, gregs[i]),
|
||||||
gregnames[i]);
|
gregnames[i]);
|
||||||
|
|
||||||
cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_pc = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, pc), "PC");
|
offsetof(CPUSH4State, pc), "PC");
|
||||||
cpu_sr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_sr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, sr), "SR");
|
offsetof(CPUSH4State, sr), "SR");
|
||||||
cpu_sr_m = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_sr_m = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, sr_m), "SR_M");
|
offsetof(CPUSH4State, sr_m), "SR_M");
|
||||||
cpu_sr_q = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_sr_q = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, sr_q), "SR_Q");
|
offsetof(CPUSH4State, sr_q), "SR_Q");
|
||||||
cpu_sr_t = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_sr_t = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, sr_t), "SR_T");
|
offsetof(CPUSH4State, sr_t), "SR_T");
|
||||||
cpu_ssr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_ssr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, ssr), "SSR");
|
offsetof(CPUSH4State, ssr), "SSR");
|
||||||
cpu_spc = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_spc = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, spc), "SPC");
|
offsetof(CPUSH4State, spc), "SPC");
|
||||||
cpu_gbr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_gbr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, gbr), "GBR");
|
offsetof(CPUSH4State, gbr), "GBR");
|
||||||
cpu_vbr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_vbr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, vbr), "VBR");
|
offsetof(CPUSH4State, vbr), "VBR");
|
||||||
cpu_sgr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_sgr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, sgr), "SGR");
|
offsetof(CPUSH4State, sgr), "SGR");
|
||||||
cpu_dbr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_dbr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, dbr), "DBR");
|
offsetof(CPUSH4State, dbr), "DBR");
|
||||||
cpu_mach = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_mach = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, mach), "MACH");
|
offsetof(CPUSH4State, mach), "MACH");
|
||||||
cpu_macl = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_macl = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, macl), "MACL");
|
offsetof(CPUSH4State, macl), "MACL");
|
||||||
cpu_pr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_pr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, pr), "PR");
|
offsetof(CPUSH4State, pr), "PR");
|
||||||
cpu_fpscr = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_fpscr = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, fpscr), "FPSCR");
|
offsetof(CPUSH4State, fpscr), "FPSCR");
|
||||||
cpu_fpul = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_fpul = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, fpul), "FPUL");
|
offsetof(CPUSH4State, fpul), "FPUL");
|
||||||
|
|
||||||
cpu_flags = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_flags = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, flags), "_flags_");
|
offsetof(CPUSH4State, flags), "_flags_");
|
||||||
cpu_delayed_pc = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_delayed_pc = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, delayed_pc),
|
offsetof(CPUSH4State, delayed_pc),
|
||||||
"_delayed_pc_");
|
"_delayed_pc_");
|
||||||
cpu_ldst = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_ldst = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, ldst), "_ldst_");
|
offsetof(CPUSH4State, ldst), "_ldst_");
|
||||||
|
|
||||||
for (i = 0; i < 32; i++)
|
for (i = 0; i < 32; i++)
|
||||||
cpu_fregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_fregs[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSH4State, fregs[i]),
|
offsetof(CPUSH4State, fregs[i]),
|
||||||
fregnames[i]);
|
fregnames[i]);
|
||||||
|
|
||||||
|
|
|
@ -5353,75 +5353,79 @@ void gen_intermediate_code_init(CPUSPARCState *env)
|
||||||
inited = 1;
|
inited = 1;
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
cpu_regwptr = tcg_global_mem_new_ptr(TCG_AREG0,
|
cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
|
||||||
offsetof(CPUSPARCState, regwptr),
|
offsetof(CPUSPARCState, regwptr),
|
||||||
"regwptr");
|
"regwptr");
|
||||||
#ifdef TARGET_SPARC64
|
#ifdef TARGET_SPARC64
|
||||||
cpu_xcc = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, xcc),
|
cpu_xcc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, xcc),
|
||||||
"xcc");
|
"xcc");
|
||||||
cpu_asi = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, asi),
|
cpu_asi = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, asi),
|
||||||
"asi");
|
"asi");
|
||||||
cpu_fprs = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, fprs),
|
cpu_fprs = tcg_global_mem_new_i32(cpu_env,
|
||||||
|
offsetof(CPUSPARCState, fprs),
|
||||||
"fprs");
|
"fprs");
|
||||||
cpu_gsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, gsr),
|
cpu_gsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, gsr),
|
||||||
"gsr");
|
"gsr");
|
||||||
cpu_tick_cmpr = tcg_global_mem_new(TCG_AREG0,
|
cpu_tick_cmpr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, tick_cmpr),
|
offsetof(CPUSPARCState, tick_cmpr),
|
||||||
"tick_cmpr");
|
"tick_cmpr");
|
||||||
cpu_stick_cmpr = tcg_global_mem_new(TCG_AREG0,
|
cpu_stick_cmpr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, stick_cmpr),
|
offsetof(CPUSPARCState, stick_cmpr),
|
||||||
"stick_cmpr");
|
"stick_cmpr");
|
||||||
cpu_hstick_cmpr = tcg_global_mem_new(TCG_AREG0,
|
cpu_hstick_cmpr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, hstick_cmpr),
|
offsetof(CPUSPARCState, hstick_cmpr),
|
||||||
"hstick_cmpr");
|
"hstick_cmpr");
|
||||||
cpu_hintp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hintp),
|
cpu_hintp = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hintp),
|
||||||
"hintp");
|
"hintp");
|
||||||
cpu_htba = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, htba),
|
cpu_htba = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, htba),
|
||||||
"htba");
|
"htba");
|
||||||
cpu_hver = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hver),
|
cpu_hver = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hver),
|
||||||
"hver");
|
"hver");
|
||||||
cpu_ssr = tcg_global_mem_new(TCG_AREG0,
|
cpu_ssr = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, ssr), "ssr");
|
offsetof(CPUSPARCState, ssr), "ssr");
|
||||||
cpu_ver = tcg_global_mem_new(TCG_AREG0,
|
cpu_ver = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, version), "ver");
|
offsetof(CPUSPARCState, version), "ver");
|
||||||
cpu_softint = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_softint = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUSPARCState, softint),
|
offsetof(CPUSPARCState, softint),
|
||||||
"softint");
|
"softint");
|
||||||
#else
|
#else
|
||||||
cpu_wim = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, wim),
|
cpu_wim = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, wim),
|
||||||
"wim");
|
"wim");
|
||||||
#endif
|
#endif
|
||||||
cpu_cond = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cond),
|
cpu_cond = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, cond),
|
||||||
"cond");
|
"cond");
|
||||||
cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cc_src),
|
cpu_cc_src = tcg_global_mem_new(cpu_env,
|
||||||
|
offsetof(CPUSPARCState, cc_src),
|
||||||
"cc_src");
|
"cc_src");
|
||||||
cpu_cc_src2 = tcg_global_mem_new(TCG_AREG0,
|
cpu_cc_src2 = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, cc_src2),
|
offsetof(CPUSPARCState, cc_src2),
|
||||||
"cc_src2");
|
"cc_src2");
|
||||||
cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cc_dst),
|
cpu_cc_dst = tcg_global_mem_new(cpu_env,
|
||||||
|
offsetof(CPUSPARCState, cc_dst),
|
||||||
"cc_dst");
|
"cc_dst");
|
||||||
cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, cc_op),
|
cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
|
||||||
|
offsetof(CPUSPARCState, cc_op),
|
||||||
"cc_op");
|
"cc_op");
|
||||||
cpu_psr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, psr),
|
cpu_psr = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, psr),
|
||||||
"psr");
|
"psr");
|
||||||
cpu_fsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, fsr),
|
cpu_fsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, fsr),
|
||||||
"fsr");
|
"fsr");
|
||||||
cpu_pc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, pc),
|
cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, pc),
|
||||||
"pc");
|
"pc");
|
||||||
cpu_npc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, npc),
|
cpu_npc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, npc),
|
||||||
"npc");
|
"npc");
|
||||||
cpu_y = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, y), "y");
|
cpu_y = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, y), "y");
|
||||||
#ifndef CONFIG_USER_ONLY
|
#ifndef CONFIG_USER_ONLY
|
||||||
cpu_tbr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, tbr),
|
cpu_tbr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, tbr),
|
||||||
"tbr");
|
"tbr");
|
||||||
#endif
|
#endif
|
||||||
for (i = 1; i < 8; i++) {
|
for (i = 1; i < 8; i++) {
|
||||||
cpu_gregs[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_gregs[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUSPARCState, gregs[i]),
|
offsetof(CPUSPARCState, gregs[i]),
|
||||||
gregnames[i]);
|
gregnames[i]);
|
||||||
}
|
}
|
||||||
for (i = 0; i < TARGET_DPREGS; i++) {
|
for (i = 0; i < TARGET_DPREGS; i++) {
|
||||||
cpu_fpr[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUSPARCState, fpr[i]),
|
offsetof(CPUSPARCState, fpr[i]),
|
||||||
fregnames[i]);
|
fregnames[i]);
|
||||||
}
|
}
|
||||||
|
|
|
@ -2442,9 +2442,9 @@ void tilegx_tcg_init(void)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
cpu_pc = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUTLGState, pc), "pc");
|
cpu_pc = tcg_global_mem_new_i64(cpu_env, offsetof(CPUTLGState, pc), "pc");
|
||||||
for (i = 0; i < TILEGX_R_COUNT; i++) {
|
for (i = 0; i < TILEGX_R_COUNT; i++) {
|
||||||
cpu_regs[i] = tcg_global_mem_new_i64(TCG_AREG0,
|
cpu_regs[i] = tcg_global_mem_new_i64(cpu_env,
|
||||||
offsetof(CPUTLGState, regs[i]),
|
offsetof(CPUTLGState, regs[i]),
|
||||||
reg_names[i]);
|
reg_names[i]);
|
||||||
}
|
}
|
||||||
|
|
|
@ -8350,13 +8350,13 @@ void cpu_state_reset(CPUTriCoreState *env)
|
||||||
|
|
||||||
static void tricore_tcg_init_csfr(void)
|
static void tricore_tcg_init_csfr(void)
|
||||||
{
|
{
|
||||||
cpu_PCXI = tcg_global_mem_new(TCG_AREG0,
|
cpu_PCXI = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PCXI), "PCXI");
|
offsetof(CPUTriCoreState, PCXI), "PCXI");
|
||||||
cpu_PSW = tcg_global_mem_new(TCG_AREG0,
|
cpu_PSW = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PSW), "PSW");
|
offsetof(CPUTriCoreState, PSW), "PSW");
|
||||||
cpu_PC = tcg_global_mem_new(TCG_AREG0,
|
cpu_PC = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PC), "PC");
|
offsetof(CPUTriCoreState, PC), "PC");
|
||||||
cpu_ICR = tcg_global_mem_new(TCG_AREG0,
|
cpu_ICR = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, ICR), "ICR");
|
offsetof(CPUTriCoreState, ICR), "ICR");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -8370,30 +8370,30 @@ void tricore_tcg_init(void)
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
/* reg init */
|
/* reg init */
|
||||||
for (i = 0 ; i < 16 ; i++) {
|
for (i = 0 ; i < 16 ; i++) {
|
||||||
cpu_gpr_a[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_gpr_a[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, gpr_a[i]),
|
offsetof(CPUTriCoreState, gpr_a[i]),
|
||||||
regnames_a[i]);
|
regnames_a[i]);
|
||||||
}
|
}
|
||||||
for (i = 0 ; i < 16 ; i++) {
|
for (i = 0 ; i < 16 ; i++) {
|
||||||
cpu_gpr_d[i] = tcg_global_mem_new(TCG_AREG0,
|
cpu_gpr_d[i] = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, gpr_d[i]),
|
offsetof(CPUTriCoreState, gpr_d[i]),
|
||||||
regnames_d[i]);
|
regnames_d[i]);
|
||||||
}
|
}
|
||||||
tricore_tcg_init_csfr();
|
tricore_tcg_init_csfr();
|
||||||
/* init PSW flag cache */
|
/* init PSW flag cache */
|
||||||
cpu_PSW_C = tcg_global_mem_new(TCG_AREG0,
|
cpu_PSW_C = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PSW_USB_C),
|
offsetof(CPUTriCoreState, PSW_USB_C),
|
||||||
"PSW_C");
|
"PSW_C");
|
||||||
cpu_PSW_V = tcg_global_mem_new(TCG_AREG0,
|
cpu_PSW_V = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PSW_USB_V),
|
offsetof(CPUTriCoreState, PSW_USB_V),
|
||||||
"PSW_V");
|
"PSW_V");
|
||||||
cpu_PSW_SV = tcg_global_mem_new(TCG_AREG0,
|
cpu_PSW_SV = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PSW_USB_SV),
|
offsetof(CPUTriCoreState, PSW_USB_SV),
|
||||||
"PSW_SV");
|
"PSW_SV");
|
||||||
cpu_PSW_AV = tcg_global_mem_new(TCG_AREG0,
|
cpu_PSW_AV = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PSW_USB_AV),
|
offsetof(CPUTriCoreState, PSW_USB_AV),
|
||||||
"PSW_AV");
|
"PSW_AV");
|
||||||
cpu_PSW_SAV = tcg_global_mem_new(TCG_AREG0,
|
cpu_PSW_SAV = tcg_global_mem_new(cpu_env,
|
||||||
offsetof(CPUTriCoreState, PSW_USB_SAV),
|
offsetof(CPUTriCoreState, PSW_USB_SAV),
|
||||||
"PSW_SAV");
|
"PSW_SAV");
|
||||||
}
|
}
|
||||||
|
|
|
@ -71,7 +71,7 @@ void uc32_translate_init(void)
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
|
|
||||||
for (i = 0; i < 32; i++) {
|
for (i = 0; i < 32; i++) {
|
||||||
cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUUniCore32State, regs[i]), regnames[i]);
|
offsetof(CPUUniCore32State, regs[i]), regnames[i]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -218,24 +218,24 @@ void xtensa_translate_init(void)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
|
||||||
cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_pc = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUXtensaState, pc), "pc");
|
offsetof(CPUXtensaState, pc), "pc");
|
||||||
|
|
||||||
for (i = 0; i < 16; i++) {
|
for (i = 0; i < 16; i++) {
|
||||||
cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUXtensaState, regs[i]),
|
offsetof(CPUXtensaState, regs[i]),
|
||||||
regnames[i]);
|
regnames[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < 16; i++) {
|
for (i = 0; i < 16; i++) {
|
||||||
cpu_FR[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_FR[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUXtensaState, fregs[i].f32[FP_F32_LOW]),
|
offsetof(CPUXtensaState, fregs[i].f32[FP_F32_LOW]),
|
||||||
fregnames[i]);
|
fregnames[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < 256; ++i) {
|
for (i = 0; i < 256; ++i) {
|
||||||
if (sregnames[i].name) {
|
if (sregnames[i].name) {
|
||||||
cpu_SR[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_SR[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUXtensaState, sregs[i]),
|
offsetof(CPUXtensaState, sregs[i]),
|
||||||
sregnames[i].name);
|
sregnames[i].name);
|
||||||
}
|
}
|
||||||
|
@ -243,7 +243,7 @@ void xtensa_translate_init(void)
|
||||||
|
|
||||||
for (i = 0; i < 256; ++i) {
|
for (i = 0; i < 256; ++i) {
|
||||||
if (uregnames[i].name) {
|
if (uregnames[i].name) {
|
||||||
cpu_UR[i] = tcg_global_mem_new_i32(TCG_AREG0,
|
cpu_UR[i] = tcg_global_mem_new_i32(cpu_env,
|
||||||
offsetof(CPUXtensaState, uregs[i]),
|
offsetof(CPUXtensaState, uregs[i]),
|
||||||
uregnames[i].name);
|
uregnames[i].name);
|
||||||
}
|
}
|
||||||
|
|
21
tcg/tcg.c
21
tcg/tcg.c
|
@ -481,13 +481,12 @@ TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
|
||||||
return MAKE_TCGV_I64(idx);
|
return MAKE_TCGV_I64(idx);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline int tcg_global_mem_new_internal(TCGType type, int reg,
|
int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
|
||||||
intptr_t offset,
|
intptr_t offset, const char *name)
|
||||||
const char *name)
|
|
||||||
{
|
{
|
||||||
TCGContext *s = &tcg_ctx;
|
TCGContext *s = &tcg_ctx;
|
||||||
TCGTemp *ts;
|
TCGTemp *ts, *base_ts = &s->temps[GET_TCGV_PTR(base)];
|
||||||
int idx;
|
int idx, reg = base_ts->reg;
|
||||||
|
|
||||||
idx = s->nb_globals;
|
idx = s->nb_globals;
|
||||||
#if TCG_TARGET_REG_BITS == 32
|
#if TCG_TARGET_REG_BITS == 32
|
||||||
|
@ -542,18 +541,6 @@ static inline int tcg_global_mem_new_internal(TCGType type, int reg,
|
||||||
return idx;
|
return idx;
|
||||||
}
|
}
|
||||||
|
|
||||||
TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name)
|
|
||||||
{
|
|
||||||
int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
|
|
||||||
return MAKE_TCGV_I32(idx);
|
|
||||||
}
|
|
||||||
|
|
||||||
TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name)
|
|
||||||
{
|
|
||||||
int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
|
|
||||||
return MAKE_TCGV_I64(idx);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int tcg_temp_new_internal(TCGType type, int temp_local)
|
static inline int tcg_temp_new_internal(TCGType type, int temp_local)
|
||||||
{
|
{
|
||||||
TCGContext *s = &tcg_ctx;
|
TCGContext *s = &tcg_ctx;
|
||||||
|
|
38
tcg/tcg.h
38
tcg/tcg.h
|
@ -630,33 +630,55 @@ int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
|
||||||
|
|
||||||
void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
|
void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
|
||||||
|
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||||||
|
int tcg_global_mem_new_internal(TCGType, TCGv_ptr, intptr_t, const char *);
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||||||
|
|
||||||
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
|
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
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||||||
TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
|
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
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||||||
|
|
||||||
TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
|
TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
|
||||||
|
TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
|
||||||
|
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||||||
|
void tcg_temp_free_i32(TCGv_i32 arg);
|
||||||
|
void tcg_temp_free_i64(TCGv_i64 arg);
|
||||||
|
|
||||||
|
char *tcg_get_arg_str_i32(TCGContext *s, char *buf,
|
||||||
|
int buf_size, TCGv_i32 arg);
|
||||||
|
char *tcg_get_arg_str_i64(TCGContext *s, char *buf,
|
||||||
|
int buf_size, TCGv_i64 arg);
|
||||||
|
|
||||||
|
static inline TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t offset,
|
||||||
|
const char *name)
|
||||||
|
{
|
||||||
|
int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
|
||||||
|
return MAKE_TCGV_I32(idx);
|
||||||
|
}
|
||||||
|
|
||||||
static inline TCGv_i32 tcg_temp_new_i32(void)
|
static inline TCGv_i32 tcg_temp_new_i32(void)
|
||||||
{
|
{
|
||||||
return tcg_temp_new_internal_i32(0);
|
return tcg_temp_new_internal_i32(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline TCGv_i32 tcg_temp_local_new_i32(void)
|
static inline TCGv_i32 tcg_temp_local_new_i32(void)
|
||||||
{
|
{
|
||||||
return tcg_temp_new_internal_i32(1);
|
return tcg_temp_new_internal_i32(1);
|
||||||
}
|
}
|
||||||
void tcg_temp_free_i32(TCGv_i32 arg);
|
|
||||||
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
|
|
||||||
|
|
||||||
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
|
static inline TCGv_i64 tcg_global_mem_new_i64(TCGv_ptr reg, intptr_t offset,
|
||||||
TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
|
const char *name)
|
||||||
TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
|
{
|
||||||
|
int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
|
||||||
|
return MAKE_TCGV_I64(idx);
|
||||||
|
}
|
||||||
|
|
||||||
static inline TCGv_i64 tcg_temp_new_i64(void)
|
static inline TCGv_i64 tcg_temp_new_i64(void)
|
||||||
{
|
{
|
||||||
return tcg_temp_new_internal_i64(0);
|
return tcg_temp_new_internal_i64(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline TCGv_i64 tcg_temp_local_new_i64(void)
|
static inline TCGv_i64 tcg_temp_local_new_i64(void)
|
||||||
{
|
{
|
||||||
return tcg_temp_new_internal_i64(1);
|
return tcg_temp_new_internal_i64(1);
|
||||||
}
|
}
|
||||||
void tcg_temp_free_i64(TCGv_i64 arg);
|
|
||||||
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
|
|
||||||
|
|
||||||
#if defined(CONFIG_DEBUG_TCG)
|
#if defined(CONFIG_DEBUG_TCG)
|
||||||
/* If you call tcg_clear_temp_count() at the start of a section of
|
/* If you call tcg_clear_temp_count() at the start of a section of
|
||||||
|
|
Loading…
Reference in New Issue