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tests/qtest: Add xscom tests for powernv10 machine 

Add basic chip and core xscom tests for powernv10 machine, equivalent
to tests for powernv8 and 9.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Message-ID: <20230706053923.115003-3-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Nicholas Piggin 2023-07-06 15:39:23 +10:00 committed by Daniel Henrique Barboza
parent aa2addf96f
commit e1a821d471
1 changed files with 37 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

47
tests/qtest/pnv-xscom-test.c
View File

@ -15,6 +15,7 @@ typedef enum PnvChipType {
PNV_CHIP_POWER8, /* AKA Venice */
PNV_CHIP_POWER8NVL, /* AKA Naples */
PNV_CHIP_POWER9, /* AKA Nimbus */
PNV_CHIP_POWER10,
} PnvChipType;
typedef struct PnvChip {
@ -46,13 +47,22 @@ static const PnvChip pnv_chips[] = {
.cfam_id = 0x220d104900008000ull,
.first_core = 0x0,
},
{
.chip_type = PNV_CHIP_POWER10,
.cpu_model = "POWER10",
.xscom_base = 0x000603fc00000000ull,
.cfam_id = 0x120da04900008000ull,
.first_core = 0x0,
},
};
static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
{
uint64_t addr = chip->xscom_base;
if (chip->chip_type == PNV_CHIP_POWER9) {
if (chip->chip_type == PNV_CHIP_POWER10) {
addr |= ((uint64_t) pcba << 3);
} else if (chip->chip_type == PNV_CHIP_POWER9) {
addr |= ((uint64_t) pcba << 3);
} else {
addr |= (((uint64_t) pcba << 4) & ~0xffull) |
@ -82,6 +92,8 @@ static void test_cfam_id(const void *data)
if (chip->chip_type == PNV_CHIP_POWER9) {
machine = "powernv9";
} else if (chip->chip_type == PNV_CHIP_POWER10) {
machine = "powernv10";
}
qts = qtest_initf("-M %s -accel tcg -cpu %s",
@ -96,23 +108,36 @@ static void test_cfam_id(const void *data)
(PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))
#define PNV_XSCOM_P9_EC_BASE(core) \
((uint64_t)(((core) & 0x1F) + 0x20) << 24)
#define PNV_XSCOM_P10_EC_BASE(core) \
((uint64_t)((((core) & ~0x3) + 0x20) << 24) + 0x20000 + \
(0x1000 << (3 - (core & 0x3))))
#define PNV_XSCOM_EX_DTS_RESULT0 0x50000
static void test_xscom_core(QTestState *qts, const PnvChip *chip)
{
uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;
uint64_t dts0;
if (chip->chip_type == PNV_CHIP_POWER10) {
uint32_t first_core_thread_state =
PNV_XSCOM_P10_EC_BASE(chip->first_core) + 0x412;
uint64_t thread_state;
if (chip->chip_type != PNV_CHIP_POWER9) {
first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);
thread_state = pnv_xscom_read(qts, chip, first_core_thread_state);
g_assert_cmphex(thread_state, ==, 0);
} else {
first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);
uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;
uint64_t dts0;
if (chip->chip_type == PNV_CHIP_POWER9) {
first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);
} else { /* POWER8 */
first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);
}
dts0 = pnv_xscom_read(qts, chip, first_core_dts0);
g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
}
dts0 = pnv_xscom_read(qts, chip, first_core_dts0);
g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
}
static void test_core(const void *data)
@ -123,6 +148,8 @@ static void test_core(const void *data)
if (chip->chip_type == PNV_CHIP_POWER9) {
machine = "powernv9";
} else if (chip->chip_type == PNV_CHIP_POWER10) {
machine = "powernv10";
}
qts = qtest_initf("-M %s -accel tcg -cpu %s",