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target/arm: Introduce gen_gvec_fpst_zzzzp 

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-102-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-05-27 11:18:54 -07:00 committed by Peter Maydell
parent 6f5cd67008
commit e14da11035
1 changed files with 29 additions and 30 deletions
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59
target/arm/translate-sve.c
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@ -289,6 +289,30 @@ static bool gen_gvec_fpst_zzzz(DisasContext *s, gen_helper_gvec_4_ptr *fn,
return ret;
}
/* Invoke an out-of-line helper on 4 Zregs, 1 Preg, plus fpst. */
static bool gen_gvec_fpst_zzzzp(DisasContext *s, gen_helper_gvec_5_ptr *fn,
int rd, int rn, int rm, int ra, int pg,
int data, ARMFPStatusFlavour flavour)
{
if (fn == NULL) {
return false;
}
if (sve_access_check(s)) {
unsigned vsz = vec_full_reg_size(s);
TCGv_ptr status = fpstatus_ptr(flavour);
tcg_gen_gvec_5_ptr(vec_full_reg_offset(s, rd),
vec_full_reg_offset(s, rn),
vec_full_reg_offset(s, rm),
vec_full_reg_offset(s, ra),
pred_full_reg_offset(s, pg),
status, vsz, vsz, data, fn);
tcg_temp_free_ptr(status);
}
return true;
}
/* Invoke an out-of-line helper on 2 Zregs and a predicate. */
static bool gen_gvec_ool_zzp(DisasContext *s, gen_helper_gvec_3 *fn,
int rd, int rn, int pg, int data)
@ -3977,21 +4001,8 @@ TRANS_FEAT(FCADD, aa64_sve, gen_gvec_fpst_zzzp, fcadd_fns[a->esz],
static bool do_fmla(DisasContext *s, arg_rprrr_esz *a,
gen_helper_gvec_5_ptr *fn)
{
if (a->esz == 0) {
return false;
}
if (sve_access_check(s)) {
unsigned vsz = vec_full_reg_size(s);
TCGv_ptr status = fpstatus_ptr(a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
tcg_gen_gvec_5_ptr(vec_full_reg_offset(s, a->rd),
vec_full_reg_offset(s, a->rn),
vec_full_reg_offset(s, a->rm),
vec_full_reg_offset(s, a->ra),
pred_full_reg_offset(s, a->pg),
status, vsz, vsz, 0, fn);
tcg_temp_free_ptr(status);
}
return true;
return gen_gvec_fpst_zzzzp(s, fn, a->rd, a->rn, a->rm, a->ra, a->pg, 0,
a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
}
#define DO_FMLA(NAME, name) \
@ -4020,21 +4031,9 @@ static bool trans_FCMLA_zpzzz(DisasContext *s, arg_FCMLA_zpzzz *a)
gen_helper_sve_fcmla_zpzzz_d,
};
if (a->esz == 0) {
return false;
}
if (sve_access_check(s)) {
unsigned vsz = vec_full_reg_size(s);
TCGv_ptr status = fpstatus_ptr(a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
tcg_gen_gvec_5_ptr(vec_full_reg_offset(s, a->rd),
vec_full_reg_offset(s, a->rn),
vec_full_reg_offset(s, a->rm),
vec_full_reg_offset(s, a->ra),
pred_full_reg_offset(s, a->pg),
status, vsz, vsz, a->rot, fns[a->esz]);
tcg_temp_free_ptr(status);
}
return true;
return gen_gvec_fpst_zzzzp(s, fns[a->esz], a->rd, a->rn, a->rm,
a->ra, a->pg, a->rot,
a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
}
static bool trans_FCMLA_zzxz(DisasContext *s, arg_FCMLA_zzxz *a)