mirror of https://github.com/xemu-project/xemu.git
x86 queue, 2020-10-15
Cleanups: * Drop x86_cpu_get_supported_feature_word() forward declaration (Vitaly Kuznetsov) * Delete kvm_allows_irq0_override() (Eduardo Habkost) * Correct documentation of kvm_irqchip_*() (Eduardo Habkost) * Fix FEATURE_HYPERV_EDX value in hyperv_passthrough case (Zhenyu Wang) Deprecation: * CPU model deprecation API (Robert Hoo) * Mark Icelake-Client CPU models deprecated (Robert Hoo) Bug fixes: * Remove core_id assert check in CPUID 0x8000001E (Babu Moger) -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEEWjIv1avE09usz9GqKAeTb5hNxaYFAl+IfE4UHGVoYWJrb3N0 QHJlZGhhdC5jb20ACgkQKAeTb5hNxaYkIA//dVNEz2Xq/NHqE/jZIpd27RdiI+jM 20iPDPMecPD0SZRKZWrl95+XYri7WhQafYuxDb2g0fnb1lGaxt1BEzE4guoVjide hj36Qe1dkZZVmUIQ02FKp1yh2L8Rj5dXkgIcW1i19KOjYNFVhQ0TvXbhj/gL52bm 0CMji3gDwwSdKJ7xfB1/psEeQxNnhIsPuICGVdanuehts0MoUMXxJRGR7WxNL+eF zDkS0GhAfFvdK+TjJMbuWTlKytoQhK+82tKXXpD2Vkg0lbgufsykunVldHenVxdR WVKvkYRrf2haYbhehMQHZlq/Pc5WE0d48zvPlQmS3FDvD8JgGP/CIcYZkdqUr73n dyD0yxhqXlorJGzUMgT1goJYGpCsvYH+LwCRPk5uvQlLUTAv05ZMf5odTROkTtZg 7tdhi88cR2qdeokFYv7sn8lb7kTbhqkTDCrOvmBmD7T0v6nuex2WWpm9mJmgmPaw 9JKS3g1g75yGXTVKLmv1PLI1m6/kBuGcp5WTiQmKtBEJ2Oapf4GhuDNSvNNGUKQI 2k/tED3TI7381Sk/Idpke+U4xzyE8T+YX/4t10Kb7fCCEox7lNk9/+7YxEXC2Rq4 vqgQoVhVoVac260rNMfZe7aMkPt7DV55JvKIywZcOrTBAOvn+eL6KP+Q69Lo0okH zCba5MqfpRi2LDs= =wYbS -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging x86 queue, 2020-10-15 Cleanups: * Drop x86_cpu_get_supported_feature_word() forward declaration (Vitaly Kuznetsov) * Delete kvm_allows_irq0_override() (Eduardo Habkost) * Correct documentation of kvm_irqchip_*() (Eduardo Habkost) * Fix FEATURE_HYPERV_EDX value in hyperv_passthrough case (Zhenyu Wang) Deprecation: * CPU model deprecation API (Robert Hoo) * Mark Icelake-Client CPU models deprecated (Robert Hoo) Bug fixes: * Remove core_id assert check in CPUID 0x8000001E (Babu Moger) # gpg: Signature made Thu 15 Oct 2020 17:43:58 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Mark Icelake-Client CPU models deprecated cpu: Introduce CPU model deprecation API kvm: Correct documentation of kvm_irqchip_*() i386/kvm: Delete kvm_allows_irq0_override() i386/kvm: Remove IRQ routing support checks i386/kvm: Require KVM_CAP_IRQ_ROUTING target/i386: Remove core_id assert check in CPUID 0x8000001E i386/kvm: fix FEATURE_HYPERV_EDX value in hyperv_passthrough case i386: drop x86_cpu_get_supported_feature_word() forward declaration Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
e12ce85b2c
|
@ -314,6 +314,12 @@ a future version of QEMU. Support for this CPU was removed from the
|
||||||
upstream Linux kernel, and there is no available upstream toolchain
|
upstream Linux kernel, and there is no available upstream toolchain
|
||||||
to build binaries for it.
|
to build binaries for it.
|
||||||
|
|
||||||
|
``Icelake-Client`` CPU Model (since 5.2.0)
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||||||
|
''''''''''''''''''''''''''''''''''''''''''
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||||||
|
|
||||||
|
``Icelake-Client`` CPU Models are deprecated. Use ``Icelake-Server`` CPU
|
||||||
|
Models instead.
|
||||||
|
|
||||||
System emulator devices
|
System emulator devices
|
||||||
-----------------------
|
-----------------------
|
||||||
|
|
||||||
|
|
|
@ -1087,6 +1087,8 @@ MemoryRegion *machine_consume_memdev(MachineState *machine,
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||||||
void machine_run_board_init(MachineState *machine)
|
void machine_run_board_init(MachineState *machine)
|
||||||
{
|
{
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||||||
MachineClass *machine_class = MACHINE_GET_CLASS(machine);
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MachineClass *machine_class = MACHINE_GET_CLASS(machine);
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||||||
|
ObjectClass *oc = object_class_by_name(machine->cpu_type);
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||||||
|
CPUClass *cc;
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||||||
|
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||||||
if (machine->ram_memdev_id) {
|
if (machine->ram_memdev_id) {
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||||||
Object *o;
|
Object *o;
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||||||
|
@ -1106,11 +1108,10 @@ void machine_run_board_init(MachineState *machine)
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* specified a CPU with -cpu check here that the user CPU is supported.
|
* specified a CPU with -cpu check here that the user CPU is supported.
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||||||
*/
|
*/
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||||||
if (machine_class->valid_cpu_types && machine->cpu_type) {
|
if (machine_class->valid_cpu_types && machine->cpu_type) {
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||||||
ObjectClass *class = object_class_by_name(machine->cpu_type);
|
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||||||
int i;
|
int i;
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||||||
|
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||||||
for (i = 0; machine_class->valid_cpu_types[i]; i++) {
|
for (i = 0; machine_class->valid_cpu_types[i]; i++) {
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if (object_class_dynamic_cast(class,
|
if (object_class_dynamic_cast(oc,
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||||||
machine_class->valid_cpu_types[i])) {
|
machine_class->valid_cpu_types[i])) {
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||||||
/* The user specificed CPU is in the valid field, we are
|
/* The user specificed CPU is in the valid field, we are
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||||||
* good to go.
|
* good to go.
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||||||
|
@ -1133,6 +1134,13 @@ void machine_run_board_init(MachineState *machine)
|
||||||
}
|
}
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||||||
}
|
}
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||||||
|
|
||||||
|
/* Check if CPU type is deprecated and warn if so */
|
||||||
|
cc = CPU_CLASS(oc);
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||||||
|
if (cc && cc->deprecation_note) {
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||||||
|
warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
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||||||
|
cc->deprecation_note);
|
||||||
|
}
|
||||||
|
|
||||||
machine_class->init(machine);
|
machine_class->init(machine);
|
||||||
}
|
}
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||||||
|
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||||||
|
|
|
@ -123,7 +123,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms,
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||||||
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
|
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
|
||||||
acpi_tables, acpi_tables_len);
|
acpi_tables, acpi_tables_len);
|
||||||
#endif
|
#endif
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
|
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
|
||||||
|
|
||||||
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
|
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
|
||||||
&e820_reserve, sizeof(e820_reserve));
|
&e820_reserve, sizeof(e820_reserve));
|
||||||
|
|
|
@ -225,9 +225,8 @@ static void kvm_apic_realize(DeviceState *dev, Error **errp)
|
||||||
memory_region_init_io(&s->io_memory, OBJECT(s), &kvm_apic_io_ops, s,
|
memory_region_init_io(&s->io_memory, OBJECT(s), &kvm_apic_io_ops, s,
|
||||||
"kvm-apic-msi", APIC_SPACE_SIZE);
|
"kvm-apic-msi", APIC_SPACE_SIZE);
|
||||||
|
|
||||||
if (kvm_has_gsi_routing()) {
|
assert(kvm_has_gsi_routing());
|
||||||
msi_nonbroken = true;
|
msi_nonbroken = true;
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void kvm_apic_unrealize(DeviceState *dev)
|
static void kvm_apic_unrealize(DeviceState *dev)
|
||||||
|
|
|
@ -25,27 +25,26 @@ void kvm_pc_setup_irq_routing(bool pci_enabled)
|
||||||
KVMState *s = kvm_state;
|
KVMState *s = kvm_state;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
|
assert(kvm_has_gsi_routing());
|
||||||
for (i = 0; i < 8; ++i) {
|
for (i = 0; i < 8; ++i) {
|
||||||
if (i == 2) {
|
if (i == 2) {
|
||||||
continue;
|
continue;
|
||||||
}
|
|
||||||
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
|
|
||||||
}
|
}
|
||||||
for (i = 8; i < 16; ++i) {
|
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
|
||||||
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
|
|
||||||
}
|
|
||||||
if (pci_enabled) {
|
|
||||||
for (i = 0; i < 24; ++i) {
|
|
||||||
if (i == 0) {
|
|
||||||
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
|
|
||||||
} else if (i != 2) {
|
|
||||||
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
kvm_irqchip_commit_routes(s);
|
|
||||||
}
|
}
|
||||||
|
for (i = 8; i < 16; ++i) {
|
||||||
|
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
|
||||||
|
}
|
||||||
|
if (pci_enabled) {
|
||||||
|
for (i = 0; i < 24; ++i) {
|
||||||
|
if (i == 0) {
|
||||||
|
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
|
||||||
|
} else if (i != 2) {
|
||||||
|
kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
kvm_irqchip_commit_routes(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
typedef struct KVMIOAPICState KVMIOAPICState;
|
typedef struct KVMIOAPICState KVMIOAPICState;
|
||||||
|
|
|
@ -290,7 +290,7 @@ static void microvm_memory_init(MicrovmMachineState *mms)
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
|
||||||
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
|
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
|
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
|
||||||
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
|
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
|
||||||
&e820_reserve, sizeof(e820_reserve));
|
&e820_reserve, sizeof(e820_reserve));
|
||||||
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
|
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
|
||||||
|
|
|
@ -827,7 +827,7 @@ void pc_guest_info_init(PCMachineState *pcms)
|
||||||
MachineState *ms = MACHINE(pcms);
|
MachineState *ms = MACHINE(pcms);
|
||||||
X86MachineState *x86ms = X86_MACHINE(pcms);
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
x86ms->apic_xrupt_override = kvm_allows_irq0_override();
|
x86ms->apic_xrupt_override = true;
|
||||||
pcms->numa_nodes = ms->numa_state->num_nodes;
|
pcms->numa_nodes = ms->numa_state->num_nodes;
|
||||||
pcms->node_mem = g_malloc0(pcms->numa_nodes *
|
pcms->node_mem = g_malloc0(pcms->numa_nodes *
|
||||||
sizeof *pcms->node_mem);
|
sizeof *pcms->node_mem);
|
||||||
|
|
|
@ -155,6 +155,8 @@ struct TranslationBlock;
|
||||||
* @disas_set_info: Setup architecture specific components of disassembly info
|
* @disas_set_info: Setup architecture specific components of disassembly info
|
||||||
* @adjust_watchpoint_address: Perform a target-specific adjustment to an
|
* @adjust_watchpoint_address: Perform a target-specific adjustment to an
|
||||||
* address before attempting to match it against watchpoints.
|
* address before attempting to match it against watchpoints.
|
||||||
|
* @deprecation_note: If this CPUClass is deprecated, this field provides
|
||||||
|
* related information.
|
||||||
*
|
*
|
||||||
* Represents a CPU family or model.
|
* Represents a CPU family or model.
|
||||||
*/
|
*/
|
||||||
|
@ -221,6 +223,7 @@ struct CPUClass {
|
||||||
vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
|
vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
|
||||||
void (*tcg_initialize)(void);
|
void (*tcg_initialize)(void);
|
||||||
|
|
||||||
|
const char *deprecation_note;
|
||||||
/* Keep non-pointer data at the end to minimize holes. */
|
/* Keep non-pointer data at the end to minimize holes. */
|
||||||
int gdb_num_core_regs;
|
int gdb_num_core_regs;
|
||||||
bool gdb_stop_before_watchpoint;
|
bool gdb_stop_before_watchpoint;
|
||||||
|
|
|
@ -51,23 +51,22 @@ extern bool kvm_msi_use_devid;
|
||||||
/**
|
/**
|
||||||
* kvm_irqchip_in_kernel:
|
* kvm_irqchip_in_kernel:
|
||||||
*
|
*
|
||||||
* Returns: true if the user asked us to create an in-kernel
|
* Returns: true if an in-kernel irqchip was created.
|
||||||
* irqchip via the "kernel_irqchip=on" machine option.
|
|
||||||
* What this actually means is architecture and machine model
|
* What this actually means is architecture and machine model
|
||||||
* specific: on PC, for instance, it means that the LAPIC,
|
* specific: on PC, for instance, it means that the LAPIC
|
||||||
* IOAPIC and PIT are all in kernel. This function should never
|
* is in kernel. This function should never be used from generic
|
||||||
* be used from generic target-independent code: use one of the
|
* target-independent code: use one of the following functions or
|
||||||
* following functions or some other specific check instead.
|
* some other specific check instead.
|
||||||
*/
|
*/
|
||||||
#define kvm_irqchip_in_kernel() (kvm_kernel_irqchip)
|
#define kvm_irqchip_in_kernel() (kvm_kernel_irqchip)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* kvm_irqchip_is_split:
|
* kvm_irqchip_is_split:
|
||||||
*
|
*
|
||||||
* Returns: true if the user asked us to split the irqchip
|
* Returns: true if the irqchip implementation is split between
|
||||||
* implementation between user and kernel space. The details are
|
* user and kernel space. The details are architecture and
|
||||||
* architecture and machine specific. On PC, it means that the PIC,
|
* machine specific. On PC, it means that the PIC, IOAPIC, and
|
||||||
* IOAPIC, and PIT are in user space while the LAPIC is in the kernel.
|
* PIT are in user space while the LAPIC is in the kernel.
|
||||||
*/
|
*/
|
||||||
#define kvm_irqchip_is_split() (kvm_split_irqchip)
|
#define kvm_irqchip_is_split() (kvm_split_irqchip)
|
||||||
|
|
||||||
|
|
|
@ -286,6 +286,10 @@
|
||||||
# in the VM configuration, because aliases may stop being
|
# in the VM configuration, because aliases may stop being
|
||||||
# migration-safe in the future (since 4.1)
|
# migration-safe in the future (since 4.1)
|
||||||
#
|
#
|
||||||
|
# @deprecated: If true, this CPU model is deprecated and may be removed in
|
||||||
|
# in some future version of QEMU according to the QEMU deprecation
|
||||||
|
# policy. (since 5.2)
|
||||||
|
#
|
||||||
# @unavailable-features is a list of QOM property names that
|
# @unavailable-features is a list of QOM property names that
|
||||||
# represent CPU model attributes that prevent the CPU from running.
|
# represent CPU model attributes that prevent the CPU from running.
|
||||||
# If the QOM property is read-only, that means there's no known
|
# If the QOM property is read-only, that means there's no known
|
||||||
|
@ -310,7 +314,8 @@
|
||||||
'static': 'bool',
|
'static': 'bool',
|
||||||
'*unavailable-features': [ 'str' ],
|
'*unavailable-features': [ 'str' ],
|
||||||
'typename': 'str',
|
'typename': 'str',
|
||||||
'*alias-of' : 'str' },
|
'*alias-of' : 'str',
|
||||||
|
'deprecated' : 'bool' },
|
||||||
'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X) || defined(TARGET_MIPS)' }
|
'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X) || defined(TARGET_MIPS)' }
|
||||||
|
|
||||||
##
|
##
|
||||||
|
|
|
@ -1633,6 +1633,7 @@ typedef struct X86CPUDefinition {
|
||||||
* If NULL, version 1 will be registered automatically.
|
* If NULL, version 1 will be registered automatically.
|
||||||
*/
|
*/
|
||||||
const X86CPUVersionDefinition *versions;
|
const X86CPUVersionDefinition *versions;
|
||||||
|
const char *deprecation_note;
|
||||||
} X86CPUDefinition;
|
} X86CPUDefinition;
|
||||||
|
|
||||||
/* Reference to a specific CPU model version */
|
/* Reference to a specific CPU model version */
|
||||||
|
@ -3357,10 +3358,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
||||||
.xlevel = 0x80000008,
|
.xlevel = 0x80000008,
|
||||||
.model_id = "Intel Core Processor (Icelake)",
|
.model_id = "Intel Core Processor (Icelake)",
|
||||||
.versions = (X86CPUVersionDefinition[]) {
|
.versions = (X86CPUVersionDefinition[]) {
|
||||||
{ .version = 1 },
|
{
|
||||||
|
.version = 1,
|
||||||
|
.note = "deprecated"
|
||||||
|
},
|
||||||
{
|
{
|
||||||
.version = 2,
|
.version = 2,
|
||||||
.note = "no TSX",
|
.note = "no TSX, deprecated",
|
||||||
.alias = "Icelake-Client-noTSX",
|
.alias = "Icelake-Client-noTSX",
|
||||||
.props = (PropValue[]) {
|
.props = (PropValue[]) {
|
||||||
{ "hle", "off" },
|
{ "hle", "off" },
|
||||||
|
@ -3369,7 +3373,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
{ /* end of list */ }
|
{ /* end of list */ }
|
||||||
}
|
},
|
||||||
|
.deprecation_note = "use Icelake-Server instead"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name = "Icelake-Server",
|
.name = "Icelake-Server",
|
||||||
|
@ -4180,9 +4185,6 @@ void x86_cpu_change_kvm_default(const char *prop, const char *value)
|
||||||
assert(pv->prop);
|
assert(pv->prop);
|
||||||
}
|
}
|
||||||
|
|
||||||
static uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
|
|
||||||
bool migratable_only);
|
|
||||||
|
|
||||||
static bool lmce_supported(void)
|
static bool lmce_supported(void)
|
||||||
{
|
{
|
||||||
uint64_t mce_cap = 0;
|
uint64_t mce_cap = 0;
|
||||||
|
@ -4993,6 +4995,11 @@ static void x86_cpu_definition_entry(gpointer data, gpointer user_data)
|
||||||
info->migration_safe = cc->migration_safe;
|
info->migration_safe = cc->migration_safe;
|
||||||
info->has_migration_safe = true;
|
info->has_migration_safe = true;
|
||||||
info->q_static = cc->static_model;
|
info->q_static = cc->static_model;
|
||||||
|
if (cc->model && cc->model->cpudef->deprecation_note) {
|
||||||
|
info->deprecated = true;
|
||||||
|
} else {
|
||||||
|
info->deprecated = false;
|
||||||
|
}
|
||||||
/*
|
/*
|
||||||
* Old machine types won't report aliases, so that alias translation
|
* Old machine types won't report aliases, so that alias translation
|
||||||
* doesn't break compatibility with previous QEMU versions.
|
* doesn't break compatibility with previous QEMU versions.
|
||||||
|
@ -5383,9 +5390,11 @@ static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data)
|
||||||
{
|
{
|
||||||
X86CPUModel *model = data;
|
X86CPUModel *model = data;
|
||||||
X86CPUClass *xcc = X86_CPU_CLASS(oc);
|
X86CPUClass *xcc = X86_CPU_CLASS(oc);
|
||||||
|
CPUClass *cc = CPU_CLASS(oc);
|
||||||
|
|
||||||
xcc->model = model;
|
xcc->model = model;
|
||||||
xcc->migration_safe = true;
|
xcc->migration_safe = true;
|
||||||
|
cc->deprecation_note = model->cpudef->deprecation_note;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void x86_register_cpu_model_type(const char *name, X86CPUModel *model)
|
static void x86_register_cpu_model_type(const char *name, X86CPUModel *model)
|
||||||
|
@ -5913,9 +5922,14 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 0x8000001E:
|
case 0x8000001E:
|
||||||
assert(cpu->core_id <= 255);
|
if (cpu->core_id <= 255) {
|
||||||
encode_topo_cpuid8000001e(cpu, &topo_info,
|
encode_topo_cpuid8000001e(cpu, &topo_info, eax, ebx, ecx, edx);
|
||||||
eax, ebx, ecx, edx);
|
} else {
|
||||||
|
*eax = 0;
|
||||||
|
*ebx = 0;
|
||||||
|
*ecx = 0;
|
||||||
|
*edx = 0;
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
case 0xC0000000:
|
case 0xC0000000:
|
||||||
*eax = env->cpuid_xlevel2;
|
*eax = env->cpuid_xlevel2;
|
||||||
|
|
|
@ -13,11 +13,6 @@
|
||||||
#include "cpu.h"
|
#include "cpu.h"
|
||||||
#include "kvm_i386.h"
|
#include "kvm_i386.h"
|
||||||
|
|
||||||
bool kvm_allows_irq0_override(void)
|
|
||||||
{
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifndef __OPTIMIZE__
|
#ifndef __OPTIMIZE__
|
||||||
bool kvm_has_smm(void)
|
bool kvm_has_smm(void)
|
||||||
{
|
{
|
||||||
|
|
|
@ -154,11 +154,6 @@ bool kvm_has_exception_payload(void)
|
||||||
return has_exception_payload;
|
return has_exception_payload;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool kvm_allows_irq0_override(void)
|
|
||||||
{
|
|
||||||
return !kvm_irqchip_in_kernel() || kvm_has_gsi_routing();
|
|
||||||
}
|
|
||||||
|
|
||||||
static bool kvm_x2apic_api_set_flags(uint64_t flags)
|
static bool kvm_x2apic_api_set_flags(uint64_t flags)
|
||||||
{
|
{
|
||||||
KVMState *s = KVM_STATE(current_accel());
|
KVMState *s = KVM_STATE(current_accel());
|
||||||
|
@ -1214,7 +1209,7 @@ static int hyperv_handle_properties(CPUState *cs,
|
||||||
if (c) {
|
if (c) {
|
||||||
env->features[FEAT_HYPERV_EAX] = c->eax;
|
env->features[FEAT_HYPERV_EAX] = c->eax;
|
||||||
env->features[FEAT_HYPERV_EBX] = c->ebx;
|
env->features[FEAT_HYPERV_EBX] = c->ebx;
|
||||||
env->features[FEAT_HYPERV_EDX] = c->eax;
|
env->features[FEAT_HYPERV_EDX] = c->edx;
|
||||||
}
|
}
|
||||||
c = cpuid_find_entry(cpuid, HV_CPUID_ENLIGHTMENT_INFO, 0);
|
c = cpuid_find_entry(cpuid, HV_CPUID_ENLIGHTMENT_INFO, 0);
|
||||||
if (c) {
|
if (c) {
|
||||||
|
@ -2114,6 +2109,11 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
|
||||||
int ret;
|
int ret;
|
||||||
struct utsname utsname;
|
struct utsname utsname;
|
||||||
|
|
||||||
|
if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
|
||||||
|
error_report("kvm: KVM_CAP_IRQ_ROUTING not supported by KVM");
|
||||||
|
return -ENOTSUP;
|
||||||
|
}
|
||||||
|
|
||||||
has_xsave = kvm_check_extension(s, KVM_CAP_XSAVE);
|
has_xsave = kvm_check_extension(s, KVM_CAP_XSAVE);
|
||||||
has_xcrs = kvm_check_extension(s, KVM_CAP_XCRS);
|
has_xcrs = kvm_check_extension(s, KVM_CAP_XCRS);
|
||||||
has_pit_state2 = kvm_check_extension(s, KVM_CAP_PIT_STATE2);
|
has_pit_state2 = kvm_check_extension(s, KVM_CAP_PIT_STATE2);
|
||||||
|
@ -4547,13 +4547,6 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
|
||||||
|
|
||||||
void kvm_arch_init_irq_routing(KVMState *s)
|
void kvm_arch_init_irq_routing(KVMState *s)
|
||||||
{
|
{
|
||||||
if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
|
|
||||||
/* If kernel can't do irq routing, interrupt source
|
|
||||||
* override 0->2 cannot be set up as required by HPET.
|
|
||||||
* So we have to disable it.
|
|
||||||
*/
|
|
||||||
no_hpet = 1;
|
|
||||||
}
|
|
||||||
/* We know at this point that we're using the in-kernel
|
/* We know at this point that we're using the in-kernel
|
||||||
* irqchip, so we can use irqfds, and on x86 we know
|
* irqchip, so we can use irqfds, and on x86 we know
|
||||||
* we can use msi via irqfd and GSI routing.
|
* we can use msi via irqfd and GSI routing.
|
||||||
|
|
|
@ -32,7 +32,6 @@
|
||||||
|
|
||||||
#endif /* CONFIG_KVM */
|
#endif /* CONFIG_KVM */
|
||||||
|
|
||||||
bool kvm_allows_irq0_override(void);
|
|
||||||
bool kvm_has_smm(void);
|
bool kvm_has_smm(void);
|
||||||
bool kvm_has_adjust_clock(void);
|
bool kvm_has_adjust_clock(void);
|
||||||
bool kvm_has_adjust_clock_stable(void);
|
bool kvm_has_adjust_clock_stable(void);
|
||||||
|
|
Loading…
Reference in New Issue