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target/riscv: Reuse tb->flags.FS 

When misa.F is 0 tb->flags.FS field is unused and can be used to save
the current state of smstateen0.FCSR check which is needed by the
floating point translation routines.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-Id: <20230518175058.2772506-3-mchitale@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Mayuresh Chitale 2023-05-18 23:20:57 +05:30 committed by Alistair Francis
parent 9514fc72d0
commit e0b343b5fa
2 changed files with 10 additions and 3 deletions
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6
target/riscv/cpu_helper.c
View File

@ -120,6 +120,12 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
vs = MIN(vs, get_field(env->mstatus_hs, MSTATUS_VS));
}
/* With Zfinx, floating point is enabled/disabled by Smstateen. */
if (!riscv_has_ext(env, RVF)) {
fs = (smstateen_acc_ok(env, 0, SMSTATEEN0_FCSR) == RISCV_EXCP_NONE)
? EXT_STATUS_DIRTY : EXT_STATUS_DISABLED;
}
if (cpu->cfg.debug && !icount_enabled()) {
flags = FIELD_DP32(flags, TB_FLAGS, ITRIGGER, env->itrigger_enabled);
}

7
target/riscv/insn_trans/trans_rvf.c.inc
View File

@ -19,9 +19,10 @@
*/
#define REQUIRE_FPU do {\
if (ctx->mstatus_fs == EXT_STATUS_DISABLED) \
if (!ctx->cfg_ptr->ext_zfinx) \
return false; \
if (ctx->mstatus_fs == EXT_STATUS_DISABLED) { \
ctx->virt_inst_excp = ctx->virt_enabled && ctx->cfg_ptr->ext_zfinx; \
return false; \
} \
} while (0)
#define REQUIRE_ZFINX_OR_F(ctx) do {\