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target/i386: replace read_crN helper with read_cr8 

All other control registers are stored plainly in CPUX86State.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2024-06-13 19:43:30 +02:00
parent a1af7fba5a
commit e0448caebf
3 changed files with 7 additions and 17 deletions
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2
target/i386/helper.h
View File

@ -95,7 +95,7 @@ DEF_HELPER_FLAGS_2(monitor, TCG_CALL_NO_WG, void, env, tl)
DEF_HELPER_FLAGS_2(mwait, TCG_CALL_NO_WG, noreturn, env, int)
DEF_HELPER_1(rdmsr, void, env)
DEF_HELPER_1(wrmsr, void, env)
DEF_HELPER_FLAGS_2(read_crN, TCG_CALL_NO_RWG, tl, env, int)
DEF_HELPER_FLAGS_1(read_cr8, TCG_CALL_NO_RWG, tl, env)
DEF_HELPER_FLAGS_3(write_crN, TCG_CALL_NO_RWG, void, env, int, tl)
#endif /* !CONFIG_USER_ONLY */

2
target/i386/tcg/emit.c.inc
View File

@ -246,7 +246,7 @@ static void gen_load(DisasContext *s, X86DecodedInsn *decode, int opn, TCGv v)
case X86_OP_CR:
if (op->n == 8) {
translator_io_start(&s->base);
gen_helper_read_crN(v, tcg_env, tcg_constant_i32(op->n));
gen_helper_read_cr8(v, tcg_env);
} else {
tcg_gen_ld_tl(v, tcg_env, offsetof(CPUX86State, cr[op->n]));
}

20
target/i386/tcg/sysemu/misc_helper.c
View File

@ -63,23 +63,13 @@ target_ulong helper_inl(CPUX86State *env, uint32_t port)
cpu_get_mem_attrs(env), NULL);
}
target_ulong helper_read_crN(CPUX86State *env, int reg)
target_ulong helper_read_cr8(CPUX86State *env)
{
target_ulong val;
switch (reg) {
default:
val = env->cr[reg];
break;
case 8:
if (!(env->hflags2 & HF2_VINTR_MASK)) {
val = cpu_get_apic_tpr(env_archcpu(env)->apic_state);
} else {
val = env->int_ctl & V_TPR_MASK;
}
break;
if (!(env->hflags2 & HF2_VINTR_MASK)) {
return cpu_get_apic_tpr(env_archcpu(env)->apic_state);
} else {
return env->int_ctl & V_TPR_MASK;
}
return val;
}
void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)