mirror of https://github.com/xemu-project/xemu.git
target/i386: Added Intercept CR0 writes check
When the selective CR0 write intercept is set, all writes to bits in CR0 other than CR0.TS or CR0.MP cause a VMEXIT. Signed-off-by: Lara Lazier <laramglazier@gmail.com> Message-Id: <20210616123907.17765-5-laramglazier@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
498df2a747
commit
e0375ec760
|
@ -84,6 +84,15 @@ void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
|
||||||
{
|
{
|
||||||
switch (reg) {
|
switch (reg) {
|
||||||
case 0:
|
case 0:
|
||||||
|
/*
|
||||||
|
* If we reach this point, the CR0 write intercept is disabled.
|
||||||
|
* But we could still exit if the hypervisor has requested the selective
|
||||||
|
* intercept for bits other than TS and MP
|
||||||
|
*/
|
||||||
|
if (cpu_svm_has_intercept(env, SVM_EXIT_CR0_SEL_WRITE) &&
|
||||||
|
((env->cr[0] ^ t0) & ~(CR0_TS_MASK | CR0_MP_MASK))) {
|
||||||
|
cpu_vmexit(env, SVM_EXIT_CR0_SEL_WRITE, 0, GETPC());
|
||||||
|
}
|
||||||
cpu_x86_update_cr0(env, t0);
|
cpu_x86_update_cr0(env, t0);
|
||||||
break;
|
break;
|
||||||
case 3:
|
case 3:
|
||||||
|
|
Loading…
Reference in New Issue