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acpi/pcihp: Convert debug printf()s to trace events 

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190402161900.7374-3-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
This commit is contained in:
Markus Armbruster 2019-04-02 18:18:59 +02:00 committed by Michael S. Tsirkin
parent b37d56ece9
commit df93b19476
2 changed files with 17 additions and 17 deletions
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25
hw/acpi/pcihp.c
View File

@ -37,14 +37,7 @@
#include "hw/pci/pci_bus.h" #include "hw/pci/pci_bus.h"
#include "qapi/error.h" #include "qapi/error.h"
#include "qom/qom-qobject.h" #include "qom/qom-qobject.h"
#include "trace.h"
//#define DEBUG
#ifdef DEBUG
# define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
#else
# define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
#endif
#define ACPI_PCIHP_ADDR 0xae00 #define ACPI_PCIHP_ADDR 0xae00
#define ACPI_PCIHP_SIZE 0x0014 #define ACPI_PCIHP_SIZE 0x0014
@ -306,23 +299,23 @@ static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
if (!s->legacy_piix) { if (!s->legacy_piix) {
s->acpi_pcihp_pci_status[bsel].up = 0; s->acpi_pcihp_pci_status[bsel].up = 0;
} }
ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val); trace_acpi_pci_up_read(val);
break; break;
case PCI_DOWN_BASE: case PCI_DOWN_BASE:
val = s->acpi_pcihp_pci_status[bsel].down; val = s->acpi_pcihp_pci_status[bsel].down;
ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val); trace_acpi_pci_down_read(val);
break; break;
case PCI_EJ_BASE: case PCI_EJ_BASE:
/* No feature defined yet */ /* No feature defined yet */
ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val); trace_acpi_pci_features_read(val);
break; break;
case PCI_RMV_BASE: case PCI_RMV_BASE:
val = s->acpi_pcihp_pci_status[bsel].hotplug_enable; val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val); trace_acpi_pci_rmv_read(val);
break; break;
case PCI_SEL_BASE: case PCI_SEL_BASE:
val = s->hotplug_select; val = s->hotplug_select;
ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val); trace_acpi_pci_sel_read(val);
default: default:
break; break;
} }
@ -340,13 +333,11 @@ static void pci_write(void *opaque, hwaddr addr, uint64_t data,
break; break;
} }
acpi_pcihp_eject_slot(s, s->hotplug_select, data); acpi_pcihp_eject_slot(s, s->hotplug_select, data);
ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n", trace_acpi_pci_ej_write(addr, data);
addr, data);
break; break;
case PCI_SEL_BASE: case PCI_SEL_BASE:
s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data; s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n", trace_acpi_pci_sel_write(addr, data);
addr, data);
default: default:
break; break;
} }

9
hw/acpi/trace-events
View File

@ -31,6 +31,15 @@ cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32
cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32 cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32 cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
# pcihp.c
acpi_pci_up_read(uint32_t val) "%" PRIu32
acpi_pci_down_read(uint32_t val) "%" PRIu32
acpi_pci_features_read(uint32_t val) "%" PRIu32
acpi_pci_rmv_read(uint32_t val) "%" PRIu32
acpi_pci_sel_read(uint32_t val) "%" PRIu32
acpi_pci_ej_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
acpi_pci_sel_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
# piix4.c # piix4.c
piix4_gpe_readb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d ==> 0x%" PRIx64 piix4_gpe_readb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d ==> 0x%" PRIx64
piix4_gpe_writeb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d <== 0x%" PRIx64 piix4_gpe_writeb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d <== 0x%" PRIx64