mirror of https://github.com/xemu-project/xemu.git
softfloat: Move muladd_floats to softfloat-parts.c.inc
Rename to parts$N_muladd. Implement float128_muladd with FloatParts128. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
aca845275a
commit
dedd123c56
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@ -413,3 +413,129 @@ static FloatPartsN *partsN(mul)(FloatPartsN *a, FloatPartsN *b,
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a->sign = sign;
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return a;
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}
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/*
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* Returns the result of multiplying the floating-point values `a' and
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* `b' then adding 'c', with no intermediate rounding step after the
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* multiplication. The operation is performed according to the
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* IEC/IEEE Standard for Binary Floating-Point Arithmetic 754-2008.
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* The flags argument allows the caller to select negation of the
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* addend, the intermediate product, or the final result. (The
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* difference between this and having the caller do a separate
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* negation is that negating externally will flip the sign bit on NaNs.)
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*
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* Requires A and C extracted into a double-sized structure to provide the
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* extra space for the widening multiply.
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*/
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static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b,
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FloatPartsN *c, int flags, float_status *s)
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{
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int ab_mask, abc_mask;
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FloatPartsW p_widen, c_widen;
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ab_mask = float_cmask(a->cls) | float_cmask(b->cls);
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abc_mask = float_cmask(c->cls) | ab_mask;
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/*
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* It is implementation-defined whether the cases of (0,inf,qnan)
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* and (inf,0,qnan) raise InvalidOperation or not (and what QNaN
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* they return if they do), so we have to hand this information
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* off to the target-specific pick-a-NaN routine.
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*/
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if (unlikely(abc_mask & float_cmask_anynan)) {
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return parts_pick_nan_muladd(a, b, c, s, ab_mask, abc_mask);
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}
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if (flags & float_muladd_negate_c) {
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c->sign ^= 1;
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}
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/* Compute the sign of the product into A. */
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a->sign ^= b->sign;
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if (flags & float_muladd_negate_product) {
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a->sign ^= 1;
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}
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if (unlikely(ab_mask != float_cmask_normal)) {
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if (unlikely(ab_mask == float_cmask_infzero)) {
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goto d_nan;
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}
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if (ab_mask & float_cmask_inf) {
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if (c->cls == float_class_inf && a->sign != c->sign) {
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goto d_nan;
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}
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goto return_inf;
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}
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g_assert(ab_mask & float_cmask_zero);
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if (c->cls == float_class_normal) {
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*a = *c;
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goto return_normal;
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}
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if (c->cls == float_class_zero) {
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if (a->sign != c->sign) {
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goto return_sub_zero;
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}
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goto return_zero;
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}
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g_assert(c->cls == float_class_inf);
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}
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if (unlikely(c->cls == float_class_inf)) {
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a->sign = c->sign;
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goto return_inf;
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}
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/* Perform the multiplication step. */
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p_widen.sign = a->sign;
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p_widen.exp = a->exp + b->exp + 1;
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frac_mulw(&p_widen, a, b);
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if (!(p_widen.frac_hi & DECOMPOSED_IMPLICIT_BIT)) {
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frac_add(&p_widen, &p_widen, &p_widen);
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p_widen.exp -= 1;
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}
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/* Perform the addition step. */
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if (c->cls != float_class_zero) {
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/* Zero-extend C to less significant bits. */
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frac_widen(&c_widen, c);
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c_widen.exp = c->exp;
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if (a->sign == c->sign) {
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parts_add_normal(&p_widen, &c_widen);
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} else if (!parts_sub_normal(&p_widen, &c_widen)) {
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goto return_sub_zero;
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}
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}
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/* Narrow with sticky bit, for proper rounding later. */
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frac_truncjam(a, &p_widen);
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a->sign = p_widen.sign;
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a->exp = p_widen.exp;
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return_normal:
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if (flags & float_muladd_halve_result) {
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a->exp -= 1;
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}
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finish_sign:
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if (flags & float_muladd_negate_result) {
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a->sign ^= 1;
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}
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return a;
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return_sub_zero:
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a->sign = s->float_rounding_mode == float_round_down;
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return_zero:
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a->cls = float_class_zero;
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goto finish_sign;
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return_inf:
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a->cls = float_class_inf;
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goto finish_sign;
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d_nan:
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float_raise(float_flag_invalid, s);
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parts_default_nan(a, s);
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return a;
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}
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406
fpu/softfloat.c
406
fpu/softfloat.c
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@ -716,6 +716,10 @@ static float128 float128_pack_raw(const FloatParts128 *p)
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#define PARTS_GENERIC_64_128(NAME, P) \
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QEMU_GENERIC(P, (FloatParts128 *, parts128_##NAME), parts64_##NAME)
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#define PARTS_GENERIC_64_128_256(NAME, P) \
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QEMU_GENERIC(P, (FloatParts256 *, parts256_##NAME), \
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(FloatParts128 *, parts128_##NAME), parts64_##NAME)
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#define parts_default_nan(P, S) PARTS_GENERIC_64_128(default_nan, P)(P, S)
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#define parts_silence_nan(P, S) PARTS_GENERIC_64_128(silence_nan, P)(P, S)
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@ -761,15 +765,17 @@ static void parts128_uncanon(FloatParts128 *p, float_status *status,
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static void parts64_add_normal(FloatParts64 *a, FloatParts64 *b);
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static void parts128_add_normal(FloatParts128 *a, FloatParts128 *b);
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static void parts256_add_normal(FloatParts256 *a, FloatParts256 *b);
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#define parts_add_normal(A, B) \
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PARTS_GENERIC_64_128(add_normal, A)(A, B)
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PARTS_GENERIC_64_128_256(add_normal, A)(A, B)
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static bool parts64_sub_normal(FloatParts64 *a, FloatParts64 *b);
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static bool parts128_sub_normal(FloatParts128 *a, FloatParts128 *b);
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static bool parts256_sub_normal(FloatParts256 *a, FloatParts256 *b);
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#define parts_sub_normal(A, B) \
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PARTS_GENERIC_64_128(sub_normal, A)(A, B)
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PARTS_GENERIC_64_128_256(sub_normal, A)(A, B)
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static FloatParts64 *parts64_addsub(FloatParts64 *a, FloatParts64 *b,
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float_status *s, bool subtract);
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@ -787,6 +793,16 @@ static FloatParts128 *parts128_mul(FloatParts128 *a, FloatParts128 *b,
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#define parts_mul(A, B, S) \
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PARTS_GENERIC_64_128(mul, A)(A, B, S)
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static FloatParts64 *parts64_muladd(FloatParts64 *a, FloatParts64 *b,
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FloatParts64 *c, int flags,
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float_status *s);
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static FloatParts128 *parts128_muladd(FloatParts128 *a, FloatParts128 *b,
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FloatParts128 *c, int flags,
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float_status *s);
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#define parts_muladd(A, B, C, Z, S) \
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PARTS_GENERIC_64_128(muladd, A)(A, B, C, Z, S)
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/*
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* Helper functions for softfloat-parts.c.inc, per-size operations.
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*/
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@ -794,6 +810,10 @@ static FloatParts128 *parts128_mul(FloatParts128 *a, FloatParts128 *b,
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#define FRAC_GENERIC_64_128(NAME, P) \
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QEMU_GENERIC(P, (FloatParts128 *, frac128_##NAME), frac64_##NAME)
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#define FRAC_GENERIC_64_128_256(NAME, P) \
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QEMU_GENERIC(P, (FloatParts256 *, frac256_##NAME), \
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(FloatParts128 *, frac128_##NAME), frac64_##NAME)
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static bool frac64_add(FloatParts64 *r, FloatParts64 *a, FloatParts64 *b)
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{
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return uadd64_overflow(a->frac, b->frac, &r->frac);
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@ -807,7 +827,17 @@ static bool frac128_add(FloatParts128 *r, FloatParts128 *a, FloatParts128 *b)
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return c;
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}
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#define frac_add(R, A, B) FRAC_GENERIC_64_128(add, R)(R, A, B)
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static bool frac256_add(FloatParts256 *r, FloatParts256 *a, FloatParts256 *b)
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{
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bool c = 0;
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r->frac_lo = uadd64_carry(a->frac_lo, b->frac_lo, &c);
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r->frac_lm = uadd64_carry(a->frac_lm, b->frac_lm, &c);
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r->frac_hm = uadd64_carry(a->frac_hm, b->frac_hm, &c);
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r->frac_hi = uadd64_carry(a->frac_hi, b->frac_hi, &c);
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return c;
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}
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#define frac_add(R, A, B) FRAC_GENERIC_64_128_256(add, R)(R, A, B)
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static bool frac64_addi(FloatParts64 *r, FloatParts64 *a, uint64_t c)
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{
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@ -902,7 +932,16 @@ static void frac128_neg(FloatParts128 *a)
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a->frac_hi = usub64_borrow(0, a->frac_hi, &c);
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}
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#define frac_neg(A) FRAC_GENERIC_64_128(neg, A)(A)
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static void frac256_neg(FloatParts256 *a)
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{
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bool c = 0;
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a->frac_lo = usub64_borrow(0, a->frac_lo, &c);
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a->frac_lm = usub64_borrow(0, a->frac_lm, &c);
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a->frac_hm = usub64_borrow(0, a->frac_hm, &c);
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a->frac_hi = usub64_borrow(0, a->frac_hi, &c);
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}
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#define frac_neg(A) FRAC_GENERIC_64_128_256(neg, A)(A)
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static int frac64_normalize(FloatParts64 *a)
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{
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@ -933,7 +972,55 @@ static int frac128_normalize(FloatParts128 *a)
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return 128;
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}
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#define frac_normalize(A) FRAC_GENERIC_64_128(normalize, A)(A)
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static int frac256_normalize(FloatParts256 *a)
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{
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uint64_t a0 = a->frac_hi, a1 = a->frac_hm;
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uint64_t a2 = a->frac_lm, a3 = a->frac_lo;
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int ret, shl, shr;
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if (likely(a0)) {
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shl = clz64(a0);
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if (shl == 0) {
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return 0;
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}
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ret = shl;
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} else {
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if (a1) {
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ret = 64;
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a0 = a1, a1 = a2, a2 = a3, a3 = 0;
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} else if (a2) {
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ret = 128;
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a0 = a2, a1 = a3, a2 = 0, a3 = 0;
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} else if (a3) {
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ret = 192;
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a0 = a3, a1 = 0, a2 = 0, a3 = 0;
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} else {
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ret = 256;
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a0 = 0, a1 = 0, a2 = 0, a3 = 0;
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goto done;
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}
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shl = clz64(a0);
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if (shl == 0) {
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goto done;
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}
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ret += shl;
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}
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shr = -shl & 63;
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a0 = (a0 << shl) | (a1 >> shr);
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a1 = (a1 << shl) | (a2 >> shr);
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a2 = (a2 << shl) | (a3 >> shr);
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a3 = (a3 << shl);
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done:
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a->frac_hi = a0;
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a->frac_hm = a1;
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a->frac_lm = a2;
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a->frac_lo = a3;
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return ret;
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}
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#define frac_normalize(A) FRAC_GENERIC_64_128_256(normalize, A)(A)
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static void frac64_shl(FloatParts64 *a, int c)
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{
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@ -969,7 +1056,51 @@ static void frac128_shrjam(FloatParts128 *a, int c)
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shift128RightJamming(a->frac_hi, a->frac_lo, c, &a->frac_hi, &a->frac_lo);
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}
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#define frac_shrjam(A, C) FRAC_GENERIC_64_128(shrjam, A)(A, C)
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static void frac256_shrjam(FloatParts256 *a, int c)
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{
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uint64_t a0 = a->frac_hi, a1 = a->frac_hm;
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uint64_t a2 = a->frac_lm, a3 = a->frac_lo;
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uint64_t sticky = 0;
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int invc;
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if (unlikely(c == 0)) {
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return;
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} else if (likely(c < 64)) {
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/* nothing */
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} else if (likely(c < 256)) {
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if (unlikely(c & 128)) {
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sticky |= a2 | a3;
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a3 = a1, a2 = a0, a1 = 0, a0 = 0;
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}
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if (unlikely(c & 64)) {
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sticky |= a3;
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a3 = a2, a2 = a1, a1 = a0, a0 = 0;
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}
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c &= 63;
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if (c == 0) {
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goto done;
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}
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} else {
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sticky = a0 | a1 | a2 | a3;
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a0 = a1 = a2 = a3 = 0;
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goto done;
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}
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invc = -c & 63;
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sticky |= a3 << invc;
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a3 = (a3 >> c) | (a2 << invc);
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a2 = (a2 >> c) | (a1 << invc);
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a1 = (a1 >> c) | (a0 << invc);
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a0 = (a0 >> c);
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done:
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a->frac_lo = a3 | (sticky != 0);
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a->frac_lm = a2;
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a->frac_hm = a1;
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a->frac_hi = a0;
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}
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#define frac_shrjam(A, C) FRAC_GENERIC_64_128_256(shrjam, A)(A, C)
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static bool frac64_sub(FloatParts64 *r, FloatParts64 *a, FloatParts64 *b)
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{
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@ -984,7 +1115,17 @@ static bool frac128_sub(FloatParts128 *r, FloatParts128 *a, FloatParts128 *b)
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return c;
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}
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#define frac_sub(R, A, B) FRAC_GENERIC_64_128(sub, R)(R, A, B)
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static bool frac256_sub(FloatParts256 *r, FloatParts256 *a, FloatParts256 *b)
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{
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bool c = 0;
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r->frac_lo = usub64_borrow(a->frac_lo, b->frac_lo, &c);
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r->frac_lm = usub64_borrow(a->frac_lm, b->frac_lm, &c);
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r->frac_hm = usub64_borrow(a->frac_hm, b->frac_hm, &c);
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r->frac_hi = usub64_borrow(a->frac_hi, b->frac_hi, &c);
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return c;
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}
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#define frac_sub(R, A, B) FRAC_GENERIC_64_128_256(sub, R)(R, A, B)
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static void frac64_truncjam(FloatParts64 *r, FloatParts128 *a)
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{
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@ -999,6 +1140,22 @@ static void frac128_truncjam(FloatParts128 *r, FloatParts256 *a)
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#define frac_truncjam(R, A) FRAC_GENERIC_64_128(truncjam, R)(R, A)
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static void frac64_widen(FloatParts128 *r, FloatParts64 *a)
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{
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r->frac_hi = a->frac;
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r->frac_lo = 0;
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}
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static void frac128_widen(FloatParts256 *r, FloatParts128 *a)
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{
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r->frac_hi = a->frac_hi;
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r->frac_hm = a->frac_lo;
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r->frac_lm = 0;
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r->frac_lo = 0;
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}
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#define frac_widen(A, B) FRAC_GENERIC_64_128(widen, B)(A, B)
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#define partsN(NAME) glue(glue(glue(parts,N),_),NAME)
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#define FloatPartsN glue(FloatParts,N)
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#define FloatPartsW glue(FloatParts,W)
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@ -1017,6 +1174,12 @@ static void frac128_truncjam(FloatParts128 *r, FloatParts256 *a)
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#include "softfloat-parts-addsub.c.inc"
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#include "softfloat-parts.c.inc"
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#undef N
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#undef W
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#define N 256
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#include "softfloat-parts-addsub.c.inc"
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#undef N
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#undef W
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#undef partsN
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@ -1387,230 +1550,48 @@ float128_mul(float128 a, float128 b, float_status *status)
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}
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/*
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* Returns the result of multiplying the floating-point values `a' and
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* `b' then adding 'c', with no intermediate rounding step after the
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* multiplication. The operation is performed according to the
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* IEC/IEEE Standard for Binary Floating-Point Arithmetic 754-2008.
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* The flags argument allows the caller to select negation of the
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* addend, the intermediate product, or the final result. (The
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* difference between this and having the caller do a separate
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* negation is that negating externally will flip the sign bit on
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* NaNs.)
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* Fused multiply-add
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*/
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static FloatParts64 muladd_floats(FloatParts64 a, FloatParts64 b, FloatParts64 c,
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int flags, float_status *s)
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{
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bool inf_zero, p_sign;
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bool sign_flip = flags & float_muladd_negate_result;
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FloatClass p_class;
|
||||
uint64_t hi, lo;
|
||||
int p_exp;
|
||||
int ab_mask, abc_mask;
|
||||
|
||||
ab_mask = float_cmask(a.cls) | float_cmask(b.cls);
|
||||
abc_mask = float_cmask(c.cls) | ab_mask;
|
||||
inf_zero = ab_mask == float_cmask_infzero;
|
||||
|
||||
/* It is implementation-defined whether the cases of (0,inf,qnan)
|
||||
* and (inf,0,qnan) raise InvalidOperation or not (and what QNaN
|
||||
* they return if they do), so we have to hand this information
|
||||
* off to the target-specific pick-a-NaN routine.
|
||||
*/
|
||||
if (unlikely(abc_mask & float_cmask_anynan)) {
|
||||
return *parts_pick_nan_muladd(&a, &b, &c, s, ab_mask, abc_mask);
|
||||
}
|
||||
|
||||
if (inf_zero) {
|
||||
float_raise(float_flag_invalid, s);
|
||||
parts_default_nan(&a, s);
|
||||
return a;
|
||||
}
|
||||
|
||||
if (flags & float_muladd_negate_c) {
|
||||
c.sign ^= 1;
|
||||
}
|
||||
|
||||
p_sign = a.sign ^ b.sign;
|
||||
|
||||
if (flags & float_muladd_negate_product) {
|
||||
p_sign ^= 1;
|
||||
}
|
||||
|
||||
if (ab_mask & float_cmask_inf) {
|
||||
p_class = float_class_inf;
|
||||
} else if (ab_mask & float_cmask_zero) {
|
||||
p_class = float_class_zero;
|
||||
} else {
|
||||
p_class = float_class_normal;
|
||||
}
|
||||
|
||||
if (c.cls == float_class_inf) {
|
||||
if (p_class == float_class_inf && p_sign != c.sign) {
|
||||
float_raise(float_flag_invalid, s);
|
||||
parts_default_nan(&c, s);
|
||||
} else {
|
||||
c.sign ^= sign_flip;
|
||||
}
|
||||
return c;
|
||||
}
|
||||
|
||||
if (p_class == float_class_inf) {
|
||||
a.cls = float_class_inf;
|
||||
a.sign = p_sign ^ sign_flip;
|
||||
return a;
|
||||
}
|
||||
|
||||
if (p_class == float_class_zero) {
|
||||
if (c.cls == float_class_zero) {
|
||||
if (p_sign != c.sign) {
|
||||
p_sign = s->float_rounding_mode == float_round_down;
|
||||
}
|
||||
c.sign = p_sign;
|
||||
} else if (flags & float_muladd_halve_result) {
|
||||
c.exp -= 1;
|
||||
}
|
||||
c.sign ^= sign_flip;
|
||||
return c;
|
||||
}
|
||||
|
||||
/* a & b should be normals now... */
|
||||
assert(a.cls == float_class_normal &&
|
||||
b.cls == float_class_normal);
|
||||
|
||||
p_exp = a.exp + b.exp;
|
||||
|
||||
mul64To128(a.frac, b.frac, &hi, &lo);
|
||||
|
||||
/* Renormalize to the msb. */
|
||||
if (hi & DECOMPOSED_IMPLICIT_BIT) {
|
||||
p_exp += 1;
|
||||
} else {
|
||||
shortShift128Left(hi, lo, 1, &hi, &lo);
|
||||
}
|
||||
|
||||
/* + add/sub */
|
||||
if (c.cls != float_class_zero) {
|
||||
int exp_diff = p_exp - c.exp;
|
||||
if (p_sign == c.sign) {
|
||||
/* Addition */
|
||||
if (exp_diff <= 0) {
|
||||
shift64RightJamming(hi, -exp_diff, &hi);
|
||||
p_exp = c.exp;
|
||||
if (uadd64_overflow(hi, c.frac, &hi)) {
|
||||
shift64RightJamming(hi, 1, &hi);
|
||||
hi |= DECOMPOSED_IMPLICIT_BIT;
|
||||
p_exp += 1;
|
||||
}
|
||||
} else {
|
||||
uint64_t c_hi, c_lo, over;
|
||||
shift128RightJamming(c.frac, 0, exp_diff, &c_hi, &c_lo);
|
||||
add192(0, hi, lo, 0, c_hi, c_lo, &over, &hi, &lo);
|
||||
if (over) {
|
||||
shift64RightJamming(hi, 1, &hi);
|
||||
hi |= DECOMPOSED_IMPLICIT_BIT;
|
||||
p_exp += 1;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/* Subtraction */
|
||||
uint64_t c_hi = c.frac, c_lo = 0;
|
||||
|
||||
if (exp_diff <= 0) {
|
||||
shift128RightJamming(hi, lo, -exp_diff, &hi, &lo);
|
||||
if (exp_diff == 0
|
||||
&&
|
||||
(hi > c_hi || (hi == c_hi && lo >= c_lo))) {
|
||||
sub128(hi, lo, c_hi, c_lo, &hi, &lo);
|
||||
} else {
|
||||
sub128(c_hi, c_lo, hi, lo, &hi, &lo);
|
||||
p_sign ^= 1;
|
||||
p_exp = c.exp;
|
||||
}
|
||||
} else {
|
||||
shift128RightJamming(c_hi, c_lo,
|
||||
exp_diff,
|
||||
&c_hi, &c_lo);
|
||||
sub128(hi, lo, c_hi, c_lo, &hi, &lo);
|
||||
}
|
||||
|
||||
if (hi == 0 && lo == 0) {
|
||||
a.cls = float_class_zero;
|
||||
a.sign = s->float_rounding_mode == float_round_down;
|
||||
a.sign ^= sign_flip;
|
||||
return a;
|
||||
} else {
|
||||
int shift;
|
||||
if (hi != 0) {
|
||||
shift = clz64(hi);
|
||||
} else {
|
||||
shift = clz64(lo) + 64;
|
||||
}
|
||||
/* Normalizing to a binary point of 124 is the
|
||||
correct adjust for the exponent. However since we're
|
||||
shifting, we might as well put the binary point back
|
||||
at 63 where we really want it. Therefore shift as
|
||||
if we're leaving 1 bit at the top of the word, but
|
||||
adjust the exponent as if we're leaving 3 bits. */
|
||||
shift128Left(hi, lo, shift, &hi, &lo);
|
||||
p_exp -= shift;
|
||||
}
|
||||
}
|
||||
}
|
||||
hi |= (lo != 0);
|
||||
|
||||
if (flags & float_muladd_halve_result) {
|
||||
p_exp -= 1;
|
||||
}
|
||||
|
||||
/* finally prepare our result */
|
||||
a.cls = float_class_normal;
|
||||
a.sign = p_sign ^ sign_flip;
|
||||
a.exp = p_exp;
|
||||
a.frac = hi;
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
float16 QEMU_FLATTEN float16_muladd(float16 a, float16 b, float16 c,
|
||||
int flags, float_status *status)
|
||||
int flags, float_status *status)
|
||||
{
|
||||
FloatParts64 pa, pb, pc, pr;
|
||||
FloatParts64 pa, pb, pc, *pr;
|
||||
|
||||
float16_unpack_canonical(&pa, a, status);
|
||||
float16_unpack_canonical(&pb, b, status);
|
||||
float16_unpack_canonical(&pc, c, status);
|
||||
pr = muladd_floats(pa, pb, pc, flags, status);
|
||||
pr = parts_muladd(&pa, &pb, &pc, flags, status);
|
||||
|
||||
return float16_round_pack_canonical(&pr, status);
|
||||
return float16_round_pack_canonical(pr, status);
|
||||
}
|
||||
|
||||
static float32 QEMU_SOFTFLOAT_ATTR
|
||||
soft_f32_muladd(float32 a, float32 b, float32 c, int flags,
|
||||
float_status *status)
|
||||
{
|
||||
FloatParts64 pa, pb, pc, pr;
|
||||
FloatParts64 pa, pb, pc, *pr;
|
||||
|
||||
float32_unpack_canonical(&pa, a, status);
|
||||
float32_unpack_canonical(&pb, b, status);
|
||||
float32_unpack_canonical(&pc, c, status);
|
||||
pr = muladd_floats(pa, pb, pc, flags, status);
|
||||
pr = parts_muladd(&pa, &pb, &pc, flags, status);
|
||||
|
||||
return float32_round_pack_canonical(&pr, status);
|
||||
return float32_round_pack_canonical(pr, status);
|
||||
}
|
||||
|
||||
static float64 QEMU_SOFTFLOAT_ATTR
|
||||
soft_f64_muladd(float64 a, float64 b, float64 c, int flags,
|
||||
float_status *status)
|
||||
{
|
||||
FloatParts64 pa, pb, pc, pr;
|
||||
FloatParts64 pa, pb, pc, *pr;
|
||||
|
||||
float64_unpack_canonical(&pa, a, status);
|
||||
float64_unpack_canonical(&pb, b, status);
|
||||
float64_unpack_canonical(&pc, c, status);
|
||||
pr = muladd_floats(pa, pb, pc, flags, status);
|
||||
pr = parts_muladd(&pa, &pb, &pc, flags, status);
|
||||
|
||||
return float64_round_pack_canonical(&pr, status);
|
||||
return float64_round_pack_canonical(pr, status);
|
||||
}
|
||||
|
||||
static bool force_soft_fma;
|
||||
|
|
@ -1757,23 +1738,30 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s)
|
|||
return soft_f64_muladd(ua.s, ub.s, uc.s, flags, s);
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns the result of multiplying the bfloat16 values `a'
|
||||
* and `b' then adding 'c', with no intermediate rounding step after the
|
||||
* multiplication.
|
||||
*/
|
||||
|
||||
bfloat16 QEMU_FLATTEN bfloat16_muladd(bfloat16 a, bfloat16 b, bfloat16 c,
|
||||
int flags, float_status *status)
|
||||
{
|
||||
FloatParts64 pa, pb, pc, pr;
|
||||
FloatParts64 pa, pb, pc, *pr;
|
||||
|
||||
bfloat16_unpack_canonical(&pa, a, status);
|
||||
bfloat16_unpack_canonical(&pb, b, status);
|
||||
bfloat16_unpack_canonical(&pc, c, status);
|
||||
pr = muladd_floats(pa, pb, pc, flags, status);
|
||||
pr = parts_muladd(&pa, &pb, &pc, flags, status);
|
||||
|
||||
return bfloat16_round_pack_canonical(&pr, status);
|
||||
return bfloat16_round_pack_canonical(pr, status);
|
||||
}
|
||||
|
||||
float128 QEMU_FLATTEN float128_muladd(float128 a, float128 b, float128 c,
|
||||
int flags, float_status *status)
|
||||
{
|
||||
FloatParts128 pa, pb, pc, *pr;
|
||||
|
||||
float128_unpack_canonical(&pa, a, status);
|
||||
float128_unpack_canonical(&pb, b, status);
|
||||
float128_unpack_canonical(&pc, c, status);
|
||||
pr = parts_muladd(&pa, &pb, &pc, flags, status);
|
||||
|
||||
return float128_round_pack_canonical(pr, status);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1197,6 +1197,8 @@ float128 float128_round_to_int(float128, float_status *status);
|
|||
float128 float128_add(float128, float128, float_status *status);
|
||||
float128 float128_sub(float128, float128, float_status *status);
|
||||
float128 float128_mul(float128, float128, float_status *status);
|
||||
float128 float128_muladd(float128, float128, float128, int,
|
||||
float_status *status);
|
||||
float128 float128_div(float128, float128, float_status *status);
|
||||
float128 float128_rem(float128, float128, float_status *status);
|
||||
float128 float128_sqrt(float128, float_status *status);
|
||||
|
|
|
|||
|
|
@ -386,7 +386,7 @@ static void bench(enum precision prec, enum op op, int n_ops, bool no_neg)
|
|||
for (i = 0; i < OPS_PER_ITER; i++) {
|
||||
float128 a = ops[0].f128;
|
||||
float128 b = ops[1].f128;
|
||||
/* float128 c = ops[2].f128; */
|
||||
float128 c = ops[2].f128;
|
||||
|
||||
switch (op) {
|
||||
case OP_ADD:
|
||||
|
|
@ -401,9 +401,9 @@ static void bench(enum precision prec, enum op op, int n_ops, bool no_neg)
|
|||
case OP_DIV:
|
||||
res.f128 = float128_div(a, b, &soft_status);
|
||||
break;
|
||||
/* case OP_FMA: */
|
||||
/* res.f128 = float128_muladd(a, b, c, 0, &soft_status); */
|
||||
/* break; */
|
||||
case OP_FMA:
|
||||
res.f128 = float128_muladd(a, b, c, 0, &soft_status);
|
||||
break;
|
||||
case OP_SQRT:
|
||||
res.f128 = float128_sqrt(a, &soft_status);
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -717,7 +717,7 @@ static void do_testfloat(int op, int rmode, bool exact)
|
|||
test_abz_f128(true_abz_f128M, subj_abz_f128M);
|
||||
break;
|
||||
case F128_MULADD:
|
||||
not_implemented();
|
||||
test_abcz_f128(slow_f128M_mulAdd, qemu_f128M_mulAdd);
|
||||
break;
|
||||
case F128_SQRT:
|
||||
test_az_f128(slow_f128M_sqrt, qemu_f128M_sqrt);
|
||||
|
|
|
|||
|
|
@ -574,6 +574,18 @@ WRAP_MULADD(qemu_f32_mulAdd, float32_muladd, float32)
|
|||
WRAP_MULADD(qemu_f64_mulAdd, float64_muladd, float64)
|
||||
#undef WRAP_MULADD
|
||||
|
||||
static void qemu_f128M_mulAdd(const float128_t *ap, const float128_t *bp,
|
||||
const float128_t *cp, float128_t *res)
|
||||
{
|
||||
float128 a, b, c, ret;
|
||||
|
||||
a = soft_to_qemu128(*ap);
|
||||
b = soft_to_qemu128(*bp);
|
||||
c = soft_to_qemu128(*cp);
|
||||
ret = float128_muladd(a, b, c, 0, &qsf);
|
||||
*res = qemu_to_soft128(ret);
|
||||
}
|
||||
|
||||
#define WRAP_CMP16(name, func, retcond) \
|
||||
static bool name(float16_t a, float16_t b) \
|
||||
{ \
|
||||
|
|
|
|||
Loading…
Reference in New Issue