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riscv: rv32: Root page table address can be larger than 32-bit
For RV32, the root page table's PPN has 22 bits hence its address bits could be larger than the maximum bits that target_ulong is able to represent. Use hwaddr instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -186,12 +186,12 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
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*prot = 0;
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*prot = 0;
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target_ulong base;
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hwaddr base;
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int levels, ptidxbits, ptesize, vm, sum;
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int levels, ptidxbits, ptesize, vm, sum;
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int mxr = get_field(env->mstatus, MSTATUS_MXR);
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int mxr = get_field(env->mstatus, MSTATUS_MXR);
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if (env->priv_ver >= PRIV_VERSION_1_10_0) {
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if (env->priv_ver >= PRIV_VERSION_1_10_0) {
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base = get_field(env->satp, SATP_PPN) << PGSHIFT;
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base = (hwaddr)get_field(env->satp, SATP_PPN) << PGSHIFT;
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sum = get_field(env->mstatus, MSTATUS_SUM);
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sum = get_field(env->mstatus, MSTATUS_SUM);
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vm = get_field(env->satp, SATP_MODE);
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vm = get_field(env->satp, SATP_MODE);
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switch (vm) {
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switch (vm) {
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@ -211,7 +211,7 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
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g_assert_not_reached();
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g_assert_not_reached();
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}
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}
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} else {
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} else {
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base = env->sptbr << PGSHIFT;
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base = (hwaddr)(env->sptbr) << PGSHIFT;
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sum = !get_field(env->mstatus, MSTATUS_PUM);
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sum = !get_field(env->mstatus, MSTATUS_PUM);
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vm = get_field(env->mstatus, MSTATUS_VM);
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vm = get_field(env->mstatus, MSTATUS_VM);
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switch (vm) {
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switch (vm) {
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@ -249,7 +249,7 @@ restart:
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((1 << ptidxbits) - 1);
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((1 << ptidxbits) - 1);
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/* check that physical address of PTE is legal */
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/* check that physical address of PTE is legal */
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target_ulong pte_addr = base + idx * ptesize;
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hwaddr pte_addr = base + idx * ptesize;
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if (riscv_feature(env, RISCV_FEATURE_PMP) &&
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if (riscv_feature(env, RISCV_FEATURE_PMP) &&
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!pmp_hart_has_privs(env, pte_addr, sizeof(target_ulong),
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!pmp_hart_has_privs(env, pte_addr, sizeof(target_ulong),
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@ -261,7 +261,7 @@ restart:
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#elif defined(TARGET_RISCV64)
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#elif defined(TARGET_RISCV64)
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target_ulong pte = ldq_phys(cs->as, pte_addr);
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target_ulong pte = ldq_phys(cs->as, pte_addr);
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#endif
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#endif
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target_ulong ppn = pte >> PTE_PPN_SHIFT;
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hwaddr ppn = pte >> PTE_PPN_SHIFT;
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if (!(pte & PTE_V)) {
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if (!(pte & PTE_V)) {
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/* Invalid PTE */
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/* Invalid PTE */
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