mirror of https://github.com/xemu-project/xemu.git
target/sparc: Remove DisasCompare.is_bool
Since we're going to feed cpu_cond to another comparison, we don't reqire a boolean value -- anything non-zero is sufficient. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -180,7 +180,6 @@ typedef struct DisasContext {
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typedef struct {
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TCGCond cond;
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bool is_bool;
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TCGv c1, c2;
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} DisasCompare;
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@ -1039,7 +1038,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
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{
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TCGv t1;
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cmp->is_bool = false;
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cmp->c1 = t1 = tcg_temp_new();
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cmp->c2 = tcg_constant_tl(0);
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@ -1104,7 +1102,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
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case 0x5: /* ltu: C */
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cmp->cond = TCG_COND_NE;
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cmp->is_bool = true;
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if (TARGET_LONG_BITS == 32 || xcc) {
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tcg_gen_mov_tl(t1, cpu_cc_C);
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} else {
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@ -1132,7 +1129,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
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}
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if (cond & 8) {
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cmp->cond = tcg_invert_cond(cmp->cond);
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cmp->is_bool = false;
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}
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}
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@ -1143,7 +1139,6 @@ static void gen_fcompare(DisasCompare *cmp, unsigned int cc, unsigned int cond)
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/* For now we still generate a straight boolean result. */
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cmp->cond = TCG_COND_NE;
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cmp->is_bool = true;
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cmp->c1 = r_dst = tcg_temp_new();
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cmp->c2 = tcg_constant_tl(0);
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@ -1230,7 +1225,6 @@ static const TCGCond gen_tcg_cond_reg[8] = {
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static void gen_compare_reg(DisasCompare *cmp, int cond, TCGv r_src)
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{
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cmp->cond = tcg_invert_cond(gen_tcg_cond_reg[cond]);
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cmp->is_bool = false;
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cmp->c1 = r_src;
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cmp->c2 = tcg_constant_tl(0);
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}
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@ -2232,18 +2226,14 @@ static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
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{
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#ifdef TARGET_SPARC64
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TCGv_i32 c32, zero, dst, s1, s2;
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TCGv_i64 c64 = tcg_temp_new_i64();
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/* We have two choices here: extend the 32 bit data and use movcond_i64,
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or fold the comparison down to 32 bits and use movcond_i32. Choose
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the later. */
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c32 = tcg_temp_new_i32();
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if (cmp->is_bool) {
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tcg_gen_extrl_i64_i32(c32, cmp->c1);
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} else {
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TCGv_i64 c64 = tcg_temp_new_i64();
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tcg_gen_setcond_i64(cmp->cond, c64, cmp->c1, cmp->c2);
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tcg_gen_extrl_i64_i32(c32, c64);
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}
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tcg_gen_setcond_i64(cmp->cond, c64, cmp->c1, cmp->c2);
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tcg_gen_extrl_i64_i32(c32, c64);
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s1 = gen_load_fpr_F(dc, rs);
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s2 = gen_load_fpr_F(dc, rd);
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@ -2445,8 +2435,10 @@ static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp,
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dc->jump_pc[0] = dest;
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dc->jump_pc[1] = npc + 4;
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dc->npc = JUMP_PC;
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if (cmp->is_bool) {
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tcg_gen_mov_tl(cpu_cond, cmp->c1);
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/* The condition for cpu_cond is always NE -- normalize. */
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if (cmp->cond == TCG_COND_NE) {
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tcg_gen_xor_tl(cpu_cond, cmp->c1, cmp->c2);
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} else {
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tcg_gen_setcond_tl(cmp->cond, cpu_cond, cmp->c1, cmp->c2);
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}
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