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Use load_image_targphys and avoid phys_ram_base. 

Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7056 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2009-04-09 20:05:49 +00:00
parent f78630ab2f
commit dcac9679fe
16 changed files with 113 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/an5206.c
View File

@ -72,8 +72,8 @@ static void an5206_init(ram_addr_t ram_size, int vga_ram_size,
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL);
}
if (kernel_size < 0) {
kernel_size = load_image(kernel_filename,
phys_ram_base + KERNEL_LOAD_ADDR);
kernel_size = load_image_targphys(kernel_filename, KERNEL_LOAD_ADDR,
ram_size - KERNEL_LOAD_ADDR);
entry = KERNEL_LOAD_ADDR;
}
if (kernel_size < 0) {

10
hw/armv7m.c
View File

@ -170,16 +170,17 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
#endif
/* Flash programming is done via the SCU, so pretend it is ROM. */
cpu_register_physical_memory(0, flash_size, IO_MEM_ROM);
cpu_register_physical_memory(0, flash_size,
qemu_ram_alloc(flash_size) | IO_MEM_ROM);
cpu_register_physical_memory(0x20000000, sram_size,
flash_size + IO_MEM_RAM);
qemu_ram_alloc(sram_size) | IO_MEM_RAM);
armv7m_bitband_init();
pic = armv7m_nvic_init(env);
image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL);
if (image_size < 0) {
image_size = load_image(kernel_filename, phys_ram_base);
image_size = load_image_targphys(kernel_filename, 0, flash_size);
lowaddr = 0;
}
if (image_size < 0) {
@ -203,7 +204,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
cpu_register_physical_memory(0xfffff000, 0x1000, IO_MEM_RAM + ram_size);
cpu_register_physical_memory(0xfffff000, 0x1000,
qemu_ram_alloc(0x1000) | IO_MEM_RAM);
return pic;
}

3
hw/axis_dev88.c
View File

@ -338,7 +338,8 @@ void axisdev88_init (ram_addr_t ram_size, int vga_ram_size,
bootstrap_pc = entry;
if (kernel_size < 0) {
/* Takes a kimage from the axis devboard SDK. */
kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);
kernel_size = load_image_targphys(kernel_filename, 0x40004000,
ram_size);
bootstrap_pc = 0x40004000;
env->regs[9] = 0x40004000 + kernel_size;
}

5
hw/dummy_m68k.c
View File

@ -47,8 +47,9 @@ static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size,
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL);
}
if (kernel_size < 0) {
kernel_size = load_image(kernel_filename,
phys_ram_base + KERNEL_LOAD_ADDR);
kernel_size = load_image_targphys(kernel_filename,
KERNEL_LOAD_ADDR,
ram_size - KERNEL_LOAD_ADDR);
entry = KERNEL_LOAD_ADDR;
}
if (kernel_size < 0) {

3
hw/etraxfs.c
View File

@ -129,7 +129,8 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
bootstrap_pc = entry;
if (kernel_size < 0) {
/* Takes a kimage from the axis devboard SDK. */
kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);
kernel_size = load_image_targphys(kernel_filename, 0x40004000,
ram_size);
bootstrap_pc = 0x40004000;
env->regs[9] = 0x40004000 + kernel_size;
}

7
hw/mcf5208.c
View File

@ -220,7 +220,7 @@ static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size,
env->vbr = 0;
/* TODO: Configure BARs. */
/* DRAM at 0x20000000 */
/* DRAM at 0x40000000 */
cpu_register_physical_memory(0x40000000, ram_size,
qemu_ram_alloc(ram_size) | IO_MEM_RAM);
@ -278,8 +278,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size,
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL);
}
if (kernel_size < 0) {
kernel_size = load_image(kernel_filename, phys_ram_base);
entry = 0x20000000;
kernel_size = load_image_targphys(kernel_filename, 0x40000000,
ram_size);
entry = 0x40000000;
}
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);

26
hw/mips_jazz.c
View File

@ -129,7 +129,6 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
enum jazz_model_e jazz_model)
{
char buf[1024];
unsigned long bios_offset;
int bios_size, n;
CPUState *env;
qemu_irq *rc4030, *i8259;
@ -141,6 +140,9 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
PITState *pit;
BlockDriverState *fds[MAX_FD];
qemu_irq esp_reset;
ram_addr_t ram_offset;
ram_addr_t bios_offset;
ram_addr_t vga_ram_offset;
/* init CPUs */
if (cpu_model == NULL) {
@ -159,25 +161,27 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
qemu_register_reset(main_cpu_reset, env);
/* allocate RAM */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
ram_offset = qemu_ram_alloc(ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
vga_ram_offset = qemu_ram_alloc(vga_ram_size);
bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
cpu_register_physical_memory(0x1fc00000LL,
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
cpu_register_physical_memory(0xfff00000LL,
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
/* load the BIOS image. */
bios_offset = ram_size + vga_ram_size;
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
bios_size = load_image_targphys(buf, 0xfff00000LL, MAGNUM_BIOS_SIZE);
if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
buf);
exit(1);
}
cpu_register_physical_memory(0x1fc00000LL,
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
cpu_register_physical_memory(0xfff00000LL,
MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
/* Init CPU internal devices */
cpu_mips_irq_init_cpu(env);
cpu_mips_clock_init(env);
@ -201,11 +205,11 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
/* Video card */
switch (jazz_model) {
case JAZZ_MAGNUM:
g364fb_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size,
g364fb_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size,
0x40000000, 0x60000000, 0, rc4030[3]);
break;
case JAZZ_PICA61:
isa_vga_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size,
isa_vga_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size,
0x40000000, 0x60000000, 0);
break;
default:

25
hw/mips_malta.c
View File

@ -717,8 +717,9 @@ static int64_t load_kernel (CPUState *env)
loaderparams.initrd_filename);
exit(1);
}
initrd_size = load_image(loaderparams.initrd_filename,
phys_ram_base + initrd_offset);
initrd_size = load_image_targphys(loaderparams.initrd_filename,
initrd_offset,
ram_size - initrd_offset);
}
if (initrd_size == (target_ulong) -1) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
@ -767,7 +768,9 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
const char *initrd_filename, const char *cpu_model)
{
char buf[1024];
unsigned long bios_offset;
ram_addr_t ram_offset;
ram_addr_t vga_ram_offset;
ram_addr_t bios_offset;
target_long bios_size;
int64_t kernel_entry;
PCIBus *pci_bus;
@ -808,10 +811,14 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
ram_offset = qemu_ram_alloc(ram_size);
vga_ram_offset = qemu_ram_alloc(vga_ram_size);
bios_offset = qemu_ram_alloc(BIOS_SIZE);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
/* Map the bios at two physical locations, as on the real board. */
bios_offset = ram_size + vga_ram_size;
cpu_register_physical_memory(0x1e000000LL,
BIOS_SIZE, bios_offset | IO_MEM_ROM);
cpu_register_physical_memory(0x1fc00000LL,
@ -851,7 +858,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE);
if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
fprintf(stderr,
"qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
@ -942,13 +949,13 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
/* Optional PCI video card */
if (cirrus_vga_enabled) {
pci_cirrus_vga_init(pci_bus, phys_ram_base + ram_size,
pci_cirrus_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
ram_size, vga_ram_size);
} else if (vmsvga_enabled) {
pci_vmsvga_init(pci_bus, phys_ram_base + ram_size,
pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_offset,
ram_size, vga_ram_size);
} else if (std_vga_enabled) {
pci_vga_init(pci_bus, phys_ram_base + ram_size,
pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
ram_size, vga_ram_size, 0, 0);
}
}

21
hw/mips_mipssim.c
View File

@ -86,8 +86,8 @@ static void load_kernel (CPUState *env)
loaderparams.initrd_filename);
exit(1);
}
initrd_size = load_image(loaderparams.initrd_filename,
phys_ram_base + initrd_offset);
initrd_size = load_image_targphys(loaderparams.initrd_filename,
initrd_offset, loaderparams.ram_size - initrd_offset);
}
if (initrd_size == (target_ulong) -1) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
@ -113,7 +113,8 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
const char *initrd_filename, const char *cpu_model)
{
char buf[1024];
unsigned long bios_offset;
ram_addr_t ram_offset;
ram_addr_t bios_offset;
CPUState *env;
int bios_size;
@ -133,14 +134,19 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
qemu_register_reset(main_cpu_reset, env);
/* Allocate RAM. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
ram_offset = qemu_ram_alloc(ram_size);
bios_offset = qemu_ram_alloc(BIOS_SIZE);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
/* Map the BIOS / boot exception handler. */
cpu_register_physical_memory(0x1fc00000LL,
BIOS_SIZE, bios_offset | IO_MEM_ROM);
/* Load a BIOS / boot exception handler image. */
bios_offset = ram_size + vga_ram_size;
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE);
if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
/* Bail out if we have neither a kernel image nor boot vector code. */
fprintf(stderr,
@ -148,9 +154,6 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
buf);
exit(1);
} else {
/* Map the BIOS / boot exception handler. */
cpu_register_physical_memory(0x1fc00000LL,
bios_size, bios_offset | IO_MEM_ROM);
/* We have a boot vector start address. */
env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
}

31
hw/mips_r4k.c
View File

@ -107,8 +107,9 @@ static void load_kernel (CPUState *env)
loaderparams.initrd_filename);
exit(1);
}
initrd_size = load_image(loaderparams.initrd_filename,
phys_ram_base + initrd_offset);
initrd_size = load_image_targphys(loaderparams.initrd_filename,
initrd_offset,
ram_size - initrd_offset);
}
if (initrd_size == (target_ulong) -1) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
@ -153,7 +154,9 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
const char *initrd_filename, const char *cpu_model)
{
char buf[1024];
unsigned long bios_offset;
ram_addr_t ram_offset;
ram_addr_t vga_ram_offset;
ram_addr_t bios_offset;
int bios_size;
CPUState *env;
RTCState *rtc_state;
@ -184,7 +187,10 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
ram_offset = qemu_ram_alloc(ram_size);
vga_ram_offset = qemu_ram_alloc(vga_ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
if (!mips_qemu_iomemtype) {
mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
@ -196,19 +202,20 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
but initialize the hardware ourselves. When a kernel gets
preloaded we also initialize the hardware, since the BIOS wasn't
run. */
bios_offset = ram_size + vga_ram_size;
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
bios_size = get_image_size(buf);
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
cpu_register_physical_memory(0x1fc00000,
BIOS_SIZE, bios_offset | IO_MEM_ROM);
bios_offset = qemu_ram_alloc(BIOS_SIZE);
cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
bios_offset | IO_MEM_ROM);
load_image_targphys(buf, 0x1fc00000, BIOS_SIZE);
} else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {
uint32_t mips_rom = 0x00400000;
cpu_register_physical_memory(0x1fc00000, mips_rom,
qemu_ram_alloc(mips_rom) | IO_MEM_ROM);
if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),
bios_offset = qemu_ram_alloc(mips_rom);
if (!pflash_cfi01_register(0x1fc00000, bios_offset,
drives_table[index].bdrv, sector_len, mips_rom / sector_len,
4, 0, 0, 0, 0)) {
fprintf(stderr, "qemu: Error registering flash memory.\n");
@ -250,7 +257,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
}
}
isa_vga_init(phys_ram_base + ram_size, ram_size,
isa_vga_init(phys_ram_base + vga_ram_offset, ram_size,
vga_ram_size);
if (nd_table[0].vlan)

7
hw/nseries.c
View File

@ -1341,6 +1341,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
}
if (option_rom[0] && (boot_device[0] == 'n' || !kernel_filename)) {
int rom_size;
/* No, wait, better start at the ROM. */
s->cpu->env->regs[15] = OMAP2_Q2_BASE + 0x400000;
@ -1353,8 +1354,10 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
*
* The code above is for loading the `zImage' file from Nokia
* images. */
printf("%i bytes of image loaded\n", load_image(option_rom[0],
phys_ram_base + 0x400000));
rom_size = load_image_targphys(option_rom[0],
OMAP2_Q2_BASE + 0x400000,
sdram_size - 0x400000);
printf("%i bytes of image loaded\n", rom_size);
n800_setup_nolo_tags(phys_ram_base + sdram_size);
}

13
hw/palm.c
View File

@ -247,16 +247,21 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
/* Setup initial (reset) machine state */
if (nb_option_roms) {
rom_size = get_image_size(option_rom[0]);
if (rom_size > flash_size)
if (rom_size > flash_size) {
fprintf(stderr, "%s: ROM image too big (%x > %x)\n",
__FUNCTION__, rom_size, flash_size);
else if (rom_size > 0 && load_image(option_rom[0],
phys_ram_base + phys_flash) > 0) {
rom_size = 0;
}
if (rom_size > 0) {
rom_size = load_image_targphys(option_rom[0], OMAP_CS0_BASE,
flash_size);
rom_loaded = 1;
cpu->env->regs[15] = 0x00000000;
} else
}
if (rom_size < 0) {
fprintf(stderr, "%s: error loading '%s'\n",
__FUNCTION__, option_rom[0]);
}
}
if (!rom_loaded && !kernel_filename) {

3
hw/ppc440_bamboo.c
View File

@ -148,7 +148,8 @@ static void bamboo_init(ram_addr_t ram_size, int vga_ram_size,
/* Load initrd. */
if (initrd_filename) {
initrd_base = kernel_size + loadaddr;
initrd_size = load_image(initrd_filename, phys_ram_base + initrd_base);
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",

4
hw/ppc_oldworld.c
View File

@ -231,8 +231,8 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
/* load initrd */
if (initrd_filename) {
initrd_base = INITRD_LOAD_ADDR;
initrd_size = load_image(initrd_filename,
phys_ram_base + initrd_base);
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
initrd_filename);

20
hw/ppc_prep.c
View File

@ -588,7 +588,15 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
bios_size = get_image_size(buf);
if (bios_size > 0 && bios_size <= BIOS_SIZE) {
target_phys_addr_t bios_addr;
bios_size = (bios_size + 0xfff) & ~0xfff;
bios_addr = (uint32_t)(-bios_size);
cpu_register_physical_memory(bios_addr, bios_size,
bios_offset | IO_MEM_ROM);
bios_size = load_image_targphys(buf, bios_addr, bios_size);
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
cpu_abort(env, "qemu: could not load PPC PREP bios '%s'\n", buf);
exit(1);
@ -596,14 +604,12 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
if (env->nip < 0xFFF80000 && bios_size < 0x00100000) {
cpu_abort(env, "PowerPC 601 / 620 / 970 need a 1MB BIOS\n");
}
bios_size = (bios_size + 0xfff) & ~0xfff;
cpu_register_physical_memory((uint32_t)(-bios_size),
bios_size, bios_offset | IO_MEM_ROM);
if (linux_boot) {
kernel_base = KERNEL_LOAD_ADDR;
/* now we can load the kernel */
kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
kernel_size = load_image_targphys(kernel_filename, kernel_base,
ram_size - kernel_base);
if (kernel_size < 0) {
cpu_abort(env, "qemu: could not load kernel '%s'\n",
kernel_filename);
@ -612,8 +618,8 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
/* load initrd */
if (initrd_filename) {
initrd_base = INITRD_LOAD_ADDR;
initrd_size = load_image(initrd_filename,
phys_ram_base + initrd_base);
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
initrd_filename);

2
hw/shix.c
View File

@ -73,7 +73,7 @@ static void shix_init(ram_addr_t ram_size, int vga_ram_size,
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
printf("%s: load BIOS '%s'\n", __func__, bios_name);
ret = load_image(bios_name, phys_ram_base);
ret = load_image_targphys(bios_name, 0, 0x4000);
if (ret < 0) { /* Check bios size */
fprintf(stderr, "ret=%d\n", ret);
fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",