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target/sh4: fetch code with translator_ld 

There is a small wrinkle with the gUSA instruction. The translator
effectively treats a (known) gUSA sequence as a single instruction.
For the purposes of the plugin we end up with a long multi-instruction
qemu_plugin_insn.

If the known sequence isn't detected we shall never run this
translation anyway.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
This commit is contained in:
Emilio G. Cota 2018-12-07 21:02:38 -05:00 committed by Alex Bennée
parent 23f42b6053
commit da94123fe1
1 changed files with 2 additions and 2 deletions
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4
target/sh4/translate.c
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@ -1917,7 +1917,7 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env)
/* Read all of the insns for the region. */ /* Read all of the insns for the region. */
for (i = 0; i < max_insns; ++i) { for (i = 0; i < max_insns; ++i) {
insns[i] = cpu_lduw_code(env, pc + i * 2); insns[i] = translator_lduw(env, pc + i * 2);
} }
ld_adr = ld_dst = ld_mop = -1; ld_adr = ld_dst = ld_mop = -1;
@ -2332,7 +2332,7 @@ static void sh4_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
} }
#endif #endif
ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next); ctx->opcode = translator_lduw(env, ctx->base.pc_next);
decode_opc(ctx); decode_opc(ctx);
ctx->base.pc_next += 2; ctx->base.pc_next += 2;
} }