mirror of https://github.com/xemu-project/xemu.git
hw/core: Sync uboot_image.h from U-Boot v2022.01
Sync uboot_image.h from upstream U-Boot v2022.01 release [1]. [1] https://source.denx.de/u-boot/u-boot/-/blob/v2022.01/include/image.h Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220324134812.541274-1-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng
Alistair Francis
parent
5160bacc06
commit
d616889ece
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@ -1,23 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2008 Semihalf
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*
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* (C) Copyright 2000-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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********************************************************************
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* NOTE: This header file defines an interface to U-Boot. Including
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* this (unmodified) header file in another file is considered normal
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@ -31,50 +17,83 @@
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/*
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* Operating System Codes
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*
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* The following are exposed to uImage header.
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* New IDs *MUST* be appended at the end of the list and *NEVER*
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* inserted for backward compatibility.
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*/
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#define IH_OS_INVALID 0 /* Invalid OS */
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#define IH_OS_OPENBSD 1 /* OpenBSD */
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#define IH_OS_NETBSD 2 /* NetBSD */
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#define IH_OS_FREEBSD 3 /* FreeBSD */
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#define IH_OS_4_4BSD 4 /* 4.4BSD */
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#define IH_OS_LINUX 5 /* Linux */
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#define IH_OS_SVR4 6 /* SVR4 */
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#define IH_OS_ESIX 7 /* Esix */
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#define IH_OS_SOLARIS 8 /* Solaris */
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#define IH_OS_IRIX 9 /* Irix */
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#define IH_OS_SCO 10 /* SCO */
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#define IH_OS_DELL 11 /* Dell */
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#define IH_OS_NCR 12 /* NCR */
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#define IH_OS_LYNXOS 13 /* LynxOS */
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#define IH_OS_VXWORKS 14 /* VxWorks */
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#define IH_OS_PSOS 15 /* pSOS */
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#define IH_OS_QNX 16 /* QNX */
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#define IH_OS_U_BOOT 17 /* Firmware */
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#define IH_OS_RTEMS 18 /* RTEMS */
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#define IH_OS_ARTOS 19 /* ARTOS */
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#define IH_OS_UNITY 20 /* Unity OS */
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enum {
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IH_OS_INVALID = 0, /* Invalid OS */
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IH_OS_OPENBSD, /* OpenBSD */
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IH_OS_NETBSD, /* NetBSD */
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IH_OS_FREEBSD, /* FreeBSD */
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IH_OS_4_4BSD, /* 4.4BSD */
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IH_OS_LINUX, /* Linux */
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IH_OS_SVR4, /* SVR4 */
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IH_OS_ESIX, /* Esix */
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IH_OS_SOLARIS, /* Solaris */
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IH_OS_IRIX, /* Irix */
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IH_OS_SCO, /* SCO */
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IH_OS_DELL, /* Dell */
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IH_OS_NCR, /* NCR */
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IH_OS_LYNXOS, /* LynxOS */
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IH_OS_VXWORKS, /* VxWorks */
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IH_OS_PSOS, /* pSOS */
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IH_OS_QNX, /* QNX */
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IH_OS_U_BOOT, /* Firmware */
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IH_OS_RTEMS, /* RTEMS */
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IH_OS_ARTOS, /* ARTOS */
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IH_OS_UNITY, /* Unity OS */
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IH_OS_INTEGRITY, /* INTEGRITY */
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IH_OS_OSE, /* OSE */
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IH_OS_PLAN9, /* Plan 9 */
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IH_OS_OPENRTOS, /* OpenRTOS */
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IH_OS_ARM_TRUSTED_FIRMWARE, /* ARM Trusted Firmware */
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IH_OS_TEE, /* Trusted Execution Environment */
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IH_OS_OPENSBI, /* RISC-V OpenSBI */
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IH_OS_EFI, /* EFI Firmware (e.g. GRUB2) */
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IH_OS_COUNT,
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};
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/*
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* CPU Architecture Codes (supported by Linux)
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*
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* The following are exposed to uImage header.
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* New IDs *MUST* be appended at the end of the list and *NEVER*
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* inserted for backward compatibility.
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*/
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#define IH_CPU_INVALID 0 /* Invalid CPU */
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#define IH_CPU_ALPHA 1 /* Alpha */
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#define IH_CPU_ARM 2 /* ARM */
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#define IH_CPU_I386 3 /* Intel x86 */
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#define IH_CPU_IA64 4 /* IA64 */
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#define IH_CPU_MIPS 5 /* MIPS */
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#define IH_CPU_MIPS64 6 /* MIPS 64 Bit */
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#define IH_CPU_PPC 7 /* PowerPC */
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#define IH_CPU_S390 8 /* IBM S390 */
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#define IH_CPU_SH 9 /* SuperH */
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#define IH_CPU_SPARC 10 /* Sparc */
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#define IH_CPU_SPARC64 11 /* Sparc 64 Bit */
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#define IH_CPU_M68K 12 /* M68K */
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#define IH_CPU_NIOS 13 /* Nios-32 */
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#define IH_CPU_MICROBLAZE 14 /* MicroBlaze */
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#define IH_CPU_NIOS2 15 /* Nios-II */
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#define IH_CPU_BLACKFIN 16 /* Blackfin */
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#define IH_CPU_AVR32 17 /* AVR32 */
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enum {
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IH_ARCH_INVALID = 0, /* Invalid CPU */
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IH_ARCH_ALPHA, /* Alpha */
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IH_ARCH_ARM, /* ARM */
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IH_ARCH_I386, /* Intel x86 */
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IH_ARCH_IA64, /* IA64 */
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IH_ARCH_MIPS, /* MIPS */
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IH_ARCH_MIPS64, /* MIPS 64 Bit */
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IH_ARCH_PPC, /* PowerPC */
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IH_ARCH_S390, /* IBM S390 */
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IH_ARCH_SH, /* SuperH */
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IH_ARCH_SPARC, /* Sparc */
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IH_ARCH_SPARC64, /* Sparc 64 Bit */
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IH_ARCH_M68K, /* M68K */
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IH_ARCH_NIOS, /* Nios-32 */
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IH_ARCH_MICROBLAZE, /* MicroBlaze */
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IH_ARCH_NIOS2, /* Nios-II */
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IH_ARCH_BLACKFIN, /* Blackfin */
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IH_ARCH_AVR32, /* AVR32 */
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IH_ARCH_ST200, /* STMicroelectronics ST200 */
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IH_ARCH_SANDBOX, /* Sandbox architecture (test only) */
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IH_ARCH_NDS32, /* ANDES Technology - NDS32 */
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IH_ARCH_OPENRISC, /* OpenRISC 1000 */
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IH_ARCH_ARM64, /* ARM64 */
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IH_ARCH_ARC, /* Synopsys DesignWare ARC */
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IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */
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IH_ARCH_XTENSA, /* Xtensa */
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IH_ARCH_RISCV, /* RISC-V */
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IH_ARCH_COUNT,
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};
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/*
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* Image Types
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@ -113,33 +132,85 @@
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* U-Boot's command interpreter; this feature is especially
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* useful when you configure U-Boot to use a real shell (hush)
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* as command interpreter (=> Shell Scripts).
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*
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* The following are exposed to uImage header.
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* New IDs *MUST* be appended at the end of the list and *NEVER*
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* inserted for backward compatibility.
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*/
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#define IH_TYPE_INVALID 0 /* Invalid Image */
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#define IH_TYPE_STANDALONE 1 /* Standalone Program */
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#define IH_TYPE_KERNEL 2 /* OS Kernel Image */
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#define IH_TYPE_RAMDISK 3 /* RAMDisk Image */
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#define IH_TYPE_MULTI 4 /* Multi-File Image */
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#define IH_TYPE_FIRMWARE 5 /* Firmware Image */
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#define IH_TYPE_SCRIPT 6 /* Script file */
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#define IH_TYPE_FILESYSTEM 7 /* Filesystem Image (any type) */
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#define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */
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#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image (noload) */
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enum {
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IH_TYPE_INVALID = 0, /* Invalid Image */
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IH_TYPE_STANDALONE, /* Standalone Program */
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IH_TYPE_KERNEL, /* OS Kernel Image */
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IH_TYPE_RAMDISK, /* RAMDisk Image */
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IH_TYPE_MULTI, /* Multi-File Image */
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IH_TYPE_FIRMWARE, /* Firmware Image */
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IH_TYPE_SCRIPT, /* Script file */
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IH_TYPE_FILESYSTEM, /* Filesystem Image (any type) */
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IH_TYPE_FLATDT, /* Binary Flat Device Tree Blob */
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IH_TYPE_KWBIMAGE, /* Kirkwood Boot Image */
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IH_TYPE_IMXIMAGE, /* Freescale IMXBoot Image */
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IH_TYPE_UBLIMAGE, /* Davinci UBL Image */
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IH_TYPE_OMAPIMAGE, /* TI OMAP Config Header Image */
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IH_TYPE_AISIMAGE, /* TI Davinci AIS Image */
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/* OS Kernel Image, can run from any load address */
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IH_TYPE_KERNEL_NOLOAD,
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IH_TYPE_PBLIMAGE, /* Freescale PBL Boot Image */
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IH_TYPE_MXSIMAGE, /* Freescale MXSBoot Image */
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IH_TYPE_GPIMAGE, /* TI Keystone GPHeader Image */
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IH_TYPE_ATMELIMAGE, /* ATMEL ROM bootable Image */
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IH_TYPE_SOCFPGAIMAGE, /* Altera SOCFPGA CV/AV Preloader */
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IH_TYPE_X86_SETUP, /* x86 setup.bin Image */
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IH_TYPE_LPC32XXIMAGE, /* x86 setup.bin Image */
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IH_TYPE_LOADABLE, /* A list of typeless images */
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IH_TYPE_RKIMAGE, /* Rockchip Boot Image */
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IH_TYPE_RKSD, /* Rockchip SD card */
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IH_TYPE_RKSPI, /* Rockchip SPI image */
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IH_TYPE_ZYNQIMAGE, /* Xilinx Zynq Boot Image */
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IH_TYPE_ZYNQMPIMAGE, /* Xilinx ZynqMP Boot Image */
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IH_TYPE_ZYNQMPBIF, /* Xilinx ZynqMP Boot Image (bif) */
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IH_TYPE_FPGA, /* FPGA Image */
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IH_TYPE_VYBRIDIMAGE, /* VYBRID .vyb Image */
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IH_TYPE_TEE, /* Trusted Execution Environment OS Image */
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IH_TYPE_FIRMWARE_IVT, /* Firmware Image with HABv4 IVT */
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IH_TYPE_PMMC, /* TI Power Management Micro-Controller Firmware */
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IH_TYPE_STM32IMAGE, /* STMicroelectronics STM32 Image */
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IH_TYPE_SOCFPGAIMAGE_V1, /* Altera SOCFPGA A10 Preloader */
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IH_TYPE_MTKIMAGE, /* MediaTek BootROM loadable Image */
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IH_TYPE_IMX8MIMAGE, /* Freescale IMX8MBoot Image */
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IH_TYPE_IMX8IMAGE, /* Freescale IMX8Boot Image */
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IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/
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IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */
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IH_TYPE_COUNT, /* Number of image types */
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};
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/*
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* Compression Types
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*
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* The following are exposed to uImage header.
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* New IDs *MUST* be appended at the end of the list and *NEVER*
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* inserted for backward compatibility.
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*/
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#define IH_COMP_NONE 0 /* No Compression Used */
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#define IH_COMP_GZIP 1 /* gzip Compression Used */
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#define IH_COMP_BZIP2 2 /* bzip2 Compression Used */
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enum {
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IH_COMP_NONE = 0, /* No Compression Used */
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IH_COMP_GZIP, /* gzip Compression Used */
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IH_COMP_BZIP2, /* bzip2 Compression Used */
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IH_COMP_LZMA, /* lzma Compression Used */
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IH_COMP_LZO, /* lzo Compression Used */
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IH_COMP_LZ4, /* lz4 Compression Used */
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IH_COMP_ZSTD, /* zstd Compression Used */
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IH_COMP_COUNT,
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};
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#define IH_MAGIC 0x27051956 /* Image Magic Number */
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#define IH_NMLEN 32 /* Image Name Length */
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/*
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* all data in network byte order (aka natural aka bigendian)
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* Legacy format image header,
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* all data in network byte order (aka natural aka bigendian).
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*/
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typedef struct uboot_image_header {
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uint32_t ih_magic; /* Image Header Magic Number */
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uint32_t ih_hcrc; /* Image Header CRC Checksum */
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