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PPC: e500: some pci related cleanup 

- Use PCI_NUM_PINS rather than hardcoding
 - use "pin" wherever possible

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Bharat Bhushan 2014-05-12 15:15:39 +05:30 committed by Alexander Graf
parent 08215d8fd8
commit d575a6ce0e
2 changed files with 14 additions and 12 deletions
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14
hw/pci-host/ppce500.c
View File

@ -87,7 +87,7 @@ struct PPCE500PCIState {
struct pci_outbound pob[PPCE500_PCI_NR_POBS];
struct pci_inbound pib[PPCE500_PCI_NR_PIBS];
uint32_t gasket_time;
qemu_irq irq[4];
qemu_irq irq[PCI_NUM_PINS];
uint32_t first_slot;
/* mmio maps */
MemoryRegion container;
@ -252,26 +252,26 @@ static const MemoryRegionOps e500_pci_reg_ops = {
.endianness = DEVICE_BIG_ENDIAN,
};
static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int pin)
{
int devno = pci_dev->devfn >> 3;
int ret;
ret = ppce500_pci_map_irq_slot(devno, irq_num);
ret = ppce500_pci_map_irq_slot(devno, pin);
pci_debug("%s: devfn %x irq %d -> %d devno:%x\n", __func__,
pci_dev->devfn, irq_num, ret, devno);
pci_dev->devfn, pin, ret, devno);
return ret;
}
static void mpc85xx_pci_set_irq(void *opaque, int irq_num, int level)
static void mpc85xx_pci_set_irq(void *opaque, int pin, int level)
{
qemu_irq *pic = opaque;
pci_debug("%s: PCI irq %d, level:%d\n", __func__, irq_num, level);
pci_debug("%s: PCI irq %d, level:%d\n", __func__, pin , level);
qemu_set_irq(pic[irq_num], level);
qemu_set_irq(pic[pin], level);
}
static const VMStateDescription vmstate_pci_outbound = {

12
hw/ppc/e500.c
View File

@ -613,7 +613,9 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
target_long initrd_size = 0;
target_ulong cur_base = 0;
int i;
unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
/* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
* 4 respectively */
unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
qemu_irq **irqs, *mpic;
DeviceState *dev;
CPUPPCState *firstenv = NULL;
@ -715,10 +717,10 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
qdev_prop_set_uint32(dev, "first_slot", params->pci_first_slot);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, mpic[pci_irq_nrs[0]]);
sysbus_connect_irq(s, 1, mpic[pci_irq_nrs[1]]);
sysbus_connect_irq(s, 2, mpic[pci_irq_nrs[2]]);
sysbus_connect_irq(s, 3, mpic[pci_irq_nrs[3]]);
for (i = 0; i < PCI_NUM_PINS; i++) {
sysbus_connect_irq(s, i, mpic[pci_irq_nrs[i]]);
}
memory_region_add_subregion(ccsr_addr_space, MPC8544_PCI_REGS_OFFSET,
sysbus_mmio_get_region(s, 0));