mirror of https://github.com/xemu-project/xemu.git
hw/net/can/xlnx-versal-canfd: Fix FIFO issues
The read index should not be changed when storing a new message into the RX or TX FIFO. Changing it at this point will cause the reader to get out of sync. The wrapping of the read index is already handled by the pre-write functions for the FIFO status registers anyway. Additionally, the calculation for wrapping the store index was off by one, which caused new messages to be written to the wrong location in the FIFO. This caused incorrect messages to be delivered. Signed-off-by: Doug Brown <doug@schmorgal.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20240827034927.66659-8-doug@schmorgal.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1144,18 +1144,8 @@ static void update_rx_sequential(XlnxVersalCANFDState *s,
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read_index = ARRAY_FIELD_EX32(s->regs, RX_FIFO_STATUS_REGISTER, RI);
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store_index = read_index + fill_level;
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if (read_index == s->cfg.rx0_fifo - 1) {
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/*
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* When ri is s->cfg.rx0_fifo - 1 i.e. max, it goes cyclic that
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* means we reset the ri to 0x0.
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*/
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read_index = 0;
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ARRAY_FIELD_DP32(s->regs, RX_FIFO_STATUS_REGISTER, RI,
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read_index);
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}
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if (store_index > s->cfg.rx0_fifo - 1) {
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store_index -= s->cfg.rx0_fifo - 1;
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store_index -= s->cfg.rx0_fifo;
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}
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store_location = R_RB_ID_REGISTER +
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@ -1172,18 +1162,8 @@ static void update_rx_sequential(XlnxVersalCANFDState *s,
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RI_1);
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store_index = read_index + fill_level;
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if (read_index == s->cfg.rx1_fifo - 1) {
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/*
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* When ri is s->cfg.rx1_fifo - 1 i.e. max, it goes cyclic that
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* means we reset the ri to 0x0.
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*/
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read_index = 0;
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ARRAY_FIELD_DP32(s->regs, RX_FIFO_STATUS_REGISTER, RI_1,
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read_index);
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}
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if (store_index > s->cfg.rx1_fifo - 1) {
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store_index -= s->cfg.rx1_fifo - 1;
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store_index -= s->cfg.rx1_fifo;
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}
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store_location = R_RB_ID_REGISTER_1 +
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@ -1265,18 +1245,8 @@ static void tx_fifo_stamp(XlnxVersalCANFDState *s, uint32_t tb0_regid)
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" Discarding the message\n");
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ARRAY_FIELD_DP32(s->regs, INTERRUPT_STATUS_REGISTER, TXEOFLW, 1);
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} else {
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if (read_index == s->cfg.tx_fifo - 1) {
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/*
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* When ri is s->cfg.tx_fifo - 1 i.e. max, it goes cyclic that
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* means we reset the ri to 0x0.
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*/
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read_index = 0;
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ARRAY_FIELD_DP32(s->regs, TX_EVENT_FIFO_STATUS_REGISTER, TXE_RI,
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read_index);
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}
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if (store_index > s->cfg.tx_fifo - 1) {
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store_index -= s->cfg.tx_fifo - 1;
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store_index -= s->cfg.tx_fifo;
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}
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assert(store_index < s->cfg.tx_fifo);
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