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target-i386: Use gen_lea_v_seg in pusha/popa 

More centralization of handling of segment bases.
Also fixes the note about 16-bit wrap around not fully handled.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1450379966-28198-7-git-send-email-rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Richard Henderson 2015-12-17 11:19:22 -08:00 committed by Paolo Bonzini
parent 3558f8055f
commit d37ea0c047
1 changed files with 23 additions and 27 deletions
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50
target-i386/translate.c
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@ -2298,45 +2298,41 @@ static inline void gen_stack_A0(DisasContext *s)
gen_lea_v_seg(s, s->ss32 ? MO_32 : MO_16, cpu_regs[R_ESP], R_SS, -1);
}
/* NOTE: wrap around in 16 bit not fully handled */
static void gen_pusha(DisasContext *s)
{
TCGMemOp s_ot = s->ss32 ? MO_32 : MO_16;
TCGMemOp d_ot = s->dflag;
int size = 1 << d_ot;
int i;
gen_op_movl_A0_reg(R_ESP);
gen_op_addl_A0_im(-(8 << s->dflag));
if (!s->ss32)
tcg_gen_ext16u_tl(cpu_A0, cpu_A0);
tcg_gen_mov_tl(cpu_T[1], cpu_A0);
if (s->addseg)
gen_op_addl_A0_seg(s, R_SS);
for(i = 0;i < 8; i++) {
gen_op_mov_v_reg(MO_32, cpu_T[0], 7 - i);
gen_op_st_v(s, s->dflag, cpu_T[0], cpu_A0);
gen_op_addl_A0_im(1 << s->dflag);
for (i = 0; i < 8; i++) {
tcg_gen_addi_tl(cpu_A0, cpu_regs[R_ESP], (i - 8) * size);
gen_lea_v_seg(s, s_ot, cpu_A0, R_SS, -1);
gen_op_st_v(s, d_ot, cpu_regs[7 - i], cpu_A0);
}
gen_op_mov_reg_v(MO_16 + s->ss32, R_ESP, cpu_T[1]);
gen_stack_update(s, -8 * size);
}
/* NOTE: wrap around in 16 bit not fully handled */
static void gen_popa(DisasContext *s)
{
TCGMemOp s_ot = s->ss32 ? MO_32 : MO_16;
TCGMemOp d_ot = s->dflag;
int size = 1 << d_ot;
int i;
gen_op_movl_A0_reg(R_ESP);
if (!s->ss32)
tcg_gen_ext16u_tl(cpu_A0, cpu_A0);
tcg_gen_mov_tl(cpu_T[1], cpu_A0);
tcg_gen_addi_tl(cpu_T[1], cpu_T[1], 8 << s->dflag);
if (s->addseg)
gen_op_addl_A0_seg(s, R_SS);
for(i = 0;i < 8; i++) {
for (i = 0; i < 8; i++) {
/* ESP is not reloaded */
if (i != 3) {
gen_op_ld_v(s, s->dflag, cpu_T[0], cpu_A0);
gen_op_mov_reg_v(s->dflag, 7 - i, cpu_T[0]);
if (7 - i == R_ESP) {
continue;
}
gen_op_addl_A0_im(1 << s->dflag);
tcg_gen_addi_tl(cpu_A0, cpu_regs[R_ESP], i * size);
gen_lea_v_seg(s, s_ot, cpu_A0, R_SS, -1);
gen_op_ld_v(s, d_ot, cpu_T[0], cpu_A0);
gen_op_mov_reg_v(d_ot, 7 - i, cpu_T[0]);
}
gen_op_mov_reg_v(MO_16 + s->ss32, R_ESP, cpu_T[1]);
gen_stack_update(s, 8 * size);
}
static void gen_enter(DisasContext *s, int esp_addend, int level)