From d271ae36dc1e292ae140f5bbf23e0fc1392dd325 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 11 Nov 2015 22:49:46 +0000 Subject: [PATCH] cuda.c: fix CUDA SR interrupt clearing Make sure that we also clear the data and clock interrupts at the same time. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/misc/macio/cuda.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index b7e9deeb15..364473fee2 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -57,6 +57,8 @@ #define IER_SET 0x80 /* set bits in IER */ #define IER_CLR 0 /* clear bits in IER */ #define SR_INT 0x04 /* Shift register full/empty */ +#define SR_DATA_INT 0x08 +#define SR_CLOCK_INT 0x10 #define T1_INT 0x40 /* Timer 1 interrupt */ #define T2_INT 0x20 /* Timer 2 interrupt */ @@ -261,7 +263,7 @@ static uint32_t cuda_readb(void *opaque, hwaddr addr) break; case 10: val = s->sr; - s->ifr &= ~SR_INT; + s->ifr &= ~(SR_INT | SR_CLOCK_INT | SR_DATA_INT); cuda_update_irq(s); break; case 11: