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target/riscv: debug: Create common trigger actions function 

Trigger actions are shared among all triggers. Extract to a common
function.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
[bmeng: handle the DBG_ACTION_NONE case]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20220909134215.1843865-7-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Frank Chang 2022-09-09 21:42:13 +08:00 committed by Alistair Francis
parent 31b9798d82
commit d1c111411e
2 changed files with 70 additions and 2 deletions
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59
target/riscv/debug.c
View File

@ -92,6 +92,37 @@ static inline target_ulong get_trigger_type(CPURISCVState *env,
return extract_trigger_type(env, env->tdata1[trigger_index]); return extract_trigger_type(env, env->tdata1[trigger_index]);
} }
static trigger_action_t get_trigger_action(CPURISCVState *env,
target_ulong trigger_index)
{
target_ulong tdata1 = env->tdata1[trigger_index];
int trigger_type = get_trigger_type(env, trigger_index);
trigger_action_t action = DBG_ACTION_NONE;
switch (trigger_type) {
case TRIGGER_TYPE_AD_MATCH:
action = (tdata1 & TYPE2_ACTION) >> 12;
break;
case TRIGGER_TYPE_INST_CNT:
case TRIGGER_TYPE_INT:
case TRIGGER_TYPE_EXCP:
case TRIGGER_TYPE_AD_MATCH6:
case TRIGGER_TYPE_EXT_SRC:
qemu_log_mask(LOG_UNIMP, "trigger type: %d is not supported\n",
trigger_type);
break;
case TRIGGER_TYPE_NO_EXIST:
case TRIGGER_TYPE_UNAVAIL:
qemu_log_mask(LOG_GUEST_ERROR, "trigger type: %d does not exit\n",
trigger_type);
break;
default:
g_assert_not_reached();
}
return action;
}
static inline target_ulong build_tdata1(CPURISCVState *env, static inline target_ulong build_tdata1(CPURISCVState *env,
trigger_type_t type, trigger_type_t type,
bool dmode, target_ulong data) bool dmode, target_ulong data)
@ -182,6 +213,30 @@ static inline void warn_always_zero_bit(target_ulong val, target_ulong mask,
} }
} }
static void do_trigger_action(CPURISCVState *env, target_ulong trigger_index)
{
trigger_action_t action = get_trigger_action(env, trigger_index);
switch (action) {
case DBG_ACTION_NONE:
break;
case DBG_ACTION_BP:
riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0);
break;
case DBG_ACTION_DBG_MODE:
case DBG_ACTION_TRACE0:
case DBG_ACTION_TRACE1:
case DBG_ACTION_TRACE2:
case DBG_ACTION_TRACE3:
case DBG_ACTION_EXT_DBG0:
case DBG_ACTION_EXT_DBG1:
qemu_log_mask(LOG_UNIMP, "action: %d is not supported\n", action);
break;
default:
g_assert_not_reached();
}
}
/* type 2 trigger */ /* type 2 trigger */
static uint32_t type2_breakpoint_size(CPURISCVState *env, target_ulong ctrl) static uint32_t type2_breakpoint_size(CPURISCVState *env, target_ulong ctrl)
@ -384,11 +439,11 @@ void riscv_cpu_debug_excp_handler(CPUState *cs)
if (cs->watchpoint_hit) { if (cs->watchpoint_hit) {
if (cs->watchpoint_hit->flags & BP_CPU) { if (cs->watchpoint_hit->flags & BP_CPU) {
cs->watchpoint_hit = NULL; cs->watchpoint_hit = NULL;
riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0); do_trigger_action(env, DBG_ACTION_BP);
} }
} else { } else {
if (cpu_breakpoint_test(cs, env->pc, BP_CPU)) { if (cpu_breakpoint_test(cs, env->pc, BP_CPU)) {
riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0); do_trigger_action(env, DBG_ACTION_BP);
} }
} }
} }

13
target/riscv/debug.h
View File

@ -44,6 +44,19 @@ typedef enum {
TRIGGER_TYPE_NUM TRIGGER_TYPE_NUM
} trigger_type_t; } trigger_type_t;
/* actions */
typedef enum {
DBG_ACTION_NONE = -1, /* sentinel value */
DBG_ACTION_BP = 0,
DBG_ACTION_DBG_MODE,
DBG_ACTION_TRACE0,
DBG_ACTION_TRACE1,
DBG_ACTION_TRACE2,
DBG_ACTION_TRACE3,
DBG_ACTION_EXT_DBG0 = 8,
DBG_ACTION_EXT_DBG1
} trigger_action_t;
/* tdata1 field masks */ /* tdata1 field masks */
#define RV32_TYPE(t) ((uint32_t)(t) << 28) #define RV32_TYPE(t) ((uint32_t)(t) << 28)