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lm32_timer: convert to memory API 

Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Avi Kivity 2011-11-20 11:44:25 +02:00
parent 9a9d0b816b
commit d09510b276
1 changed files with 14 additions and 16 deletions
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30
hw/lm32_timer.c
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@ -51,6 +51,7 @@ enum {
struct LM32TimerState { struct LM32TimerState {
SysBusDevice busdev; SysBusDevice busdev;
MemoryRegion iomem;
QEMUBH *bh; QEMUBH *bh;
ptimer_state *ptimer; ptimer_state *ptimer;
@ -70,7 +71,7 @@ static void timer_update_irq(LM32TimerState *s)
qemu_set_irq(s->irq, state); qemu_set_irq(s->irq, state);
} }
static uint32_t timer_read(void *opaque, target_phys_addr_t addr) static uint64_t timer_read(void *opaque, target_phys_addr_t addr, unsigned size)
{ {
LM32TimerState *s = opaque; LM32TimerState *s = opaque;
uint32_t r = 0; uint32_t r = 0;
@ -95,7 +96,8 @@ static uint32_t timer_read(void *opaque, target_phys_addr_t addr)
return r; return r;
} }
static void timer_write(void *opaque, target_phys_addr_t addr, uint32_t value) static void timer_write(void *opaque, target_phys_addr_t addr,
uint64_t value, unsigned size)
{ {
LM32TimerState *s = opaque; LM32TimerState *s = opaque;
@ -131,16 +133,14 @@ static void timer_write(void *opaque, target_phys_addr_t addr, uint32_t value)
timer_update_irq(s); timer_update_irq(s);
} }
static CPUReadMemoryFunc * const timer_read_fn[] = { static const MemoryRegionOps timer_ops = {
NULL, .read = timer_read,
NULL, .write = timer_write,
&timer_read, .endianness = DEVICE_NATIVE_ENDIAN,
}; .valid = {
.min_access_size = 4,
static CPUWriteMemoryFunc * const timer_write_fn[] = { .max_access_size = 4,
NULL, },
NULL,
&timer_write,
}; };
static void timer_hit(void *opaque) static void timer_hit(void *opaque)
@ -172,7 +172,6 @@ static void timer_reset(DeviceState *d)
static int lm32_timer_init(SysBusDevice *dev) static int lm32_timer_init(SysBusDevice *dev)
{ {
LM32TimerState *s = FROM_SYSBUS(typeof(*s), dev); LM32TimerState *s = FROM_SYSBUS(typeof(*s), dev);
int timer_regs;
sysbus_init_irq(dev, &s->irq); sysbus_init_irq(dev, &s->irq);
@ -180,9 +179,8 @@ static int lm32_timer_init(SysBusDevice *dev)
s->ptimer = ptimer_init(s->bh); s->ptimer = ptimer_init(s->bh);
ptimer_set_freq(s->ptimer, s->freq_hz); ptimer_set_freq(s->ptimer, s->freq_hz);
timer_regs = cpu_register_io_memory(timer_read_fn, timer_write_fn, s, memory_region_init_io(&s->iomem, &timer_ops, s, "timer", R_MAX * 4);
DEVICE_NATIVE_ENDIAN); sysbus_init_mmio_region(dev, &s->iomem);
sysbus_init_mmio(dev, R_MAX * 4, timer_regs);
return 0; return 0;
} }