mirror of https://github.com/xemu-project/xemu.git
implement dsp max instruction
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@ -53,7 +53,7 @@ static const char* disasm_opcodes_alu[256] = {
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"move" , "tfr b,a", "addr b,a", "tst a", "undefined", "cmp b,a" , "subr b,a", "cmpm b,a",
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"undefined", "tfr a,b", "addr a,b", "tst b", "undefined", "cmp a,b" , "subr a,b", "cmpm a,b",
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"add b,a" , "rnd a" , "addl b,a", "clr a", "sub b,a" , "undefined", "subl b,a", "not a",
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"add a,b" , "rnd b" , "addl a,b", "clr b", "sub a,b" , "undefined", "subl a,b", "not b",
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"add a,b" , "rnd b" , "addl a,b", "clr b", "sub a,b" , "max a,b", "subl a,b", "not b",
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"add x,a" , "adc x,a", "asr a" , "lsr a", "sub x,a" , "sbc x,a" , "abs a" , "ror a",
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"add x,b" , "adc x,b", "asr b" , "lsr b", "sub x,b" , "sbc x,b" , "abs b" , "ror b",
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"add y,a" , "adc y,a", "asl a" , "lsl a", "sub y,a" , "sbc y,a" , "neg a" , "rol a",
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@ -5056,6 +5056,31 @@ static void emu_tst_b(dsp_core_t* dsp)
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dsp->registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
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}
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static void emu_max(dsp_core_t* dsp)
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{
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uint32_t source[3], dest[3];
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dest[2] = dsp->registers[DSP_REG_A0];
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dest[1] = dsp->registers[DSP_REG_A1];
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dest[0] = dsp->registers[DSP_REG_A2];
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source[2] = dsp->registers[DSP_REG_B0];
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source[1] = dsp->registers[DSP_REG_B1];
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source[0] = dsp->registers[DSP_REG_B2];
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dsp_sub56(source, dest);
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bool pass = ((dest[0] & (1<<7))
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|| (dest[0] == 0 && dest[1] == 0 && dest[2] == 0));
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if (pass) {
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dsp->registers[DSP_REG_B0] = dsp->registers[DSP_REG_A2];
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dsp->registers[DSP_REG_B1] = dsp->registers[DSP_REG_A1];
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dsp->registers[DSP_REG_B2] = dsp->registers[DSP_REG_A0];
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}
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dsp->registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
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dsp->registers[DSP_REG_SR] |= pass<<DSP_SR_C;
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}
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static const emu_func_t opcodes_alu[256] = {
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@ -5063,7 +5088,7 @@ static const emu_func_t opcodes_alu[256] = {
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emu_move , emu_tfr_b_a, emu_addr_b_a, emu_tst_a, emu_undefined, emu_cmp_b_a, emu_subr_a, emu_cmpm_b_a,
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emu_undefined, emu_tfr_a_b, emu_addr_a_b, emu_tst_b, emu_undefined, emu_cmp_a_b, emu_subr_b, emu_cmpm_a_b,
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emu_add_b_a, emu_rnd_a, emu_addl_b_a, emu_clr_a, emu_sub_b_a, emu_undefined, emu_subl_a, emu_not_a,
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emu_add_a_b, emu_rnd_b, emu_addl_a_b, emu_clr_b, emu_sub_a_b, emu_undefined, emu_subl_b, emu_not_b,
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emu_add_a_b, emu_rnd_b, emu_addl_a_b, emu_clr_b, emu_sub_a_b, emu_max, emu_subl_b, emu_not_b,
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emu_add_x_a, emu_adc_x_a, emu_asr_a, emu_lsr_a, emu_sub_x_a, emu_sbc_x_a, emu_abs_a, emu_ror_a,
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emu_add_x_b, emu_adc_x_b, emu_asr_b, emu_lsr_b, emu_sub_x_b, emu_sbc_x_b, emu_abs_b, emu_ror_b,
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emu_add_y_a, emu_adc_y_a, emu_asl_a, emu_lsl_a, emu_sub_y_a, emu_sbc_y_a, emu_neg_a, emu_rol_a,
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