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tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero 

Fixes: 92c041c59b ("tcg/riscv: Add the prologue generation and register the JIT")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-12 20:45:36 -07:00
parent 5b5bd4a9b1
commit cf0ed30eb1
1 changed files with 4 additions and 2 deletions
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6
tcg/riscv/tcg-target.c.inc
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@ -2076,8 +2076,10 @@ static void tcg_target_qemu_prologue(TCGContext *s)
}
#if !defined(CONFIG_SOFTMMU)
tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
if (guest_base) {
tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
}
#endif
/* Call generated code */