From cd3ed7db22bafbabcb881f51c168a7cf5aecfa51 Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Mon, 18 Feb 2019 08:32:48 +0100 Subject: [PATCH] hw/misc: mips_itu: Fix 32/64 bit issue in a line involving shift operator MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix 32/64 bit issue in a line involving shift operator. "1 << ..." calculation of size is done as a 32-bit signed integer which may then be unintentionally sign-extended into the 64-bit result. The problem was discovered by Coverity (CID 1398648). Using "1ULL" instead of "1" on the LHS of the shift fixes this problem. Reported-by: Peter Maydell Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/mips_itu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 1257d8fce6..3afdbe69c6 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -94,7 +94,7 @@ void itc_reconfigure(MIPSITUState *tag) if (tag->saar_present) { address = ((*(uint64_t *) tag->saar) & 0xFFFFFFFFE000ULL) << 4; - size = 1 << ((*(uint64_t *) tag->saar >> 1) & 0x1f); + size = 1ULL << ((*(uint64_t *) tag->saar >> 1) & 0x1f); is_enabled = *(uint64_t *) tag->saar & 1; }