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aspeed/scu: Add boot-from-eMMC HW strapping bit for AST2600 SoC 

Bit SCU500[2] of the AST2600 controls the boot device of the SoC.

Future changes will configure this bit to boot from eMMC disk images
specially built for this purpose.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Cédric Le Goater 2024-07-17 08:30:17 +02:00 committed by Cédric Le Goater
parent 255aed8134
commit cc8bae6f62
1 changed files with 4 additions and 0 deletions
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4
include/hw/misc/aspeed_scu.h
View File

@ -349,6 +349,10 @@ uint32_t aspeed_scu_get_apb_freq(AspeedSCUState *s);
#define SCU_AST2600_H_PLL_BYPASS_EN (0x1 << 24)
#define SCU_AST2600_H_PLL_OFF (0x1 << 23)
/* STRAP1 SCU500 */
#define SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC (0x1 << 2)
#define SCU_AST2600_HW_STRAP_BOOT_SRC_SPI (0x0 << 2)
/*
* SCU310 Clock Selection Register Set 4 (for Aspeed AST1030 SOC)
*