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target/m68k: Implement FTRAPcc 

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Richard Henderson 2022-06-01 18:33:57 -07:00 committed by Laurent Vivier
parent 43accc4862
commit cc1cc264b1
1 changed files with 30 additions and 0 deletions
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30
target/m68k/translate.c
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@ -5566,6 +5566,34 @@ DISAS_INSN(fscc)
tcg_temp_free(tmp); tcg_temp_free(tmp);
} }
DISAS_INSN(ftrapcc)
{
DisasCompare c;
uint16_t ext;
int cond;
ext = read_im16(env, s);
cond = ext & 0x3f;
/* Consume and discard the immediate operand. */
switch (extract32(insn, 0, 3)) {
case 2: /* ftrapcc.w */
(void)read_im16(env, s);
break;
case 3: /* ftrapcc.l */
(void)read_im32(env, s);
break;
case 4: /* ftrapcc (no operand) */
break;
default:
/* ftrapcc registered with only valid opmodes */
g_assert_not_reached();
}
gen_fcc_cond(&c, s, cond);
do_trapcc(s, &c);
}
#if defined(CONFIG_SOFTMMU) #if defined(CONFIG_SOFTMMU)
DISAS_INSN(frestore) DISAS_INSN(frestore)
{ {
@ -6192,6 +6220,8 @@ void register_m68k_insns (CPUM68KState *env)
INSN(fbcc, f280, ffc0, CF_FPU); INSN(fbcc, f280, ffc0, CF_FPU);
INSN(fpu, f200, ffc0, FPU); INSN(fpu, f200, ffc0, FPU);
INSN(fscc, f240, ffc0, FPU); INSN(fscc, f240, ffc0, FPU);
INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */
INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */
INSN(fbcc, f280, ff80, FPU); INSN(fbcc, f280, ff80, FPU);
#if defined(CONFIG_SOFTMMU) #if defined(CONFIG_SOFTMMU)
INSN(frestore, f340, ffc0, CF_FPU); INSN(frestore, f340, ffc0, CF_FPU);