From cb22ce503851fde104c39670972f91f98cd79a1a Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Fri, 12 Jan 2024 12:53:54 +0000 Subject: [PATCH] esp.c: zero command register when TI command terminates due to phase change This is the behaviour documented in the datasheet and allows the state machine to correctly process multiple consecutive TI commands. Signed-off-by: Mark Cave-Ayland Tested-by: Helge Deller Tested-by: Thomas Huth Message-Id: <20240112125420.514425-63-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 4c1ca63a57..ccb8ad4bae 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -519,6 +519,7 @@ static void esp_do_dma(ESPState *s) /* ATN remains asserted until TC == 0 */ if (esp_get_tc(s) == 0) { esp_set_phase(s, STAT_CD); + s->rregs[ESP_CMD] = 0; s->rregs[ESP_RSEQ] = SEQ_CD; s->rregs[ESP_RINTR] |= INTR_BS; esp_raise_irq(s); @@ -717,6 +718,7 @@ static void esp_do_nodma(ESPState *s) */ s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo); esp_set_phase(s, STAT_CD); + s->rregs[ESP_CMD] = 0; s->rregs[ESP_RSEQ] = SEQ_CD; s->rregs[ESP_RINTR] |= INTR_BS; esp_raise_irq(s); @@ -831,6 +833,11 @@ void esp_command_complete(SCSIRequest *req, size_t resid) */ s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; break; + + case CMD_TI | CMD_DMA: + case CMD_TI: + s->rregs[ESP_CMD] = 0; + break; } /* Raise bus service interrupt to indicate change to STATUS phase */ @@ -885,6 +892,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len) * Bus service interrupt raised because of initial change to * DATA phase */ + s->rregs[ESP_CMD] = 0; s->rregs[ESP_RINTR] |= INTR_BS; break; }