mirror of https://github.com/xemu-project/xemu.git
hw/intc/arm_gicv3: Add has-nmi property to GICv3 device
Add a property has-nmi to the GICv3 device, and use this to set the NMI bit in the GICD_TYPER register. This isn't visible to guests yet because the property defaults to false and we won't set it in the board code until we've landed all of the changes needed to implement FEAT_GICV3_NMI. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-14-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -569,6 +569,7 @@ static Property arm_gicv3_common_properties[] = {
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DEFINE_PROP_UINT32("num-irq", GICv3State, num_irq, 32),
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DEFINE_PROP_UINT32("revision", GICv3State, revision, 3),
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DEFINE_PROP_BOOL("has-lpi", GICv3State, lpi_enable, 0),
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DEFINE_PROP_BOOL("has-nmi", GICv3State, nmi_support, 0),
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DEFINE_PROP_BOOL("has-security-extensions", GICv3State, security_extn, 0),
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/*
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* Compatibility property: force 8 bits of physical priority, even
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@ -389,6 +389,7 @@ static bool gicd_readl(GICv3State *s, hwaddr offset,
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* by GICD_TYPER.IDbits)
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* MBIS == 0 (message-based SPIs not supported)
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* SecurityExtn == 1 if security extns supported
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* NMI = 1 if Non-maskable interrupt property is supported
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* CPUNumber == 0 since for us ARE is always 1
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* ITLinesNumber == (((max SPI IntID + 1) / 32) - 1)
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*/
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@ -402,6 +403,7 @@ static bool gicd_readl(GICv3State *s, hwaddr offset,
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bool dvis = s->revision >= 4;
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*data = (1 << 25) | (1 << 24) | (dvis << 18) | (sec_extn << 10) |
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(s->nmi_support << GICD_TYPER_NMI_SHIFT) |
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(s->lpi_enable << GICD_TYPER_LPIS_SHIFT) |
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(0xf << 19) | itlinesnumber;
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return true;
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@ -68,6 +68,7 @@
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#define GICD_CTLR_E1NWF (1U << 7)
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#define GICD_CTLR_RWP (1U << 31)
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#define GICD_TYPER_NMI_SHIFT 9
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#define GICD_TYPER_LPIS_SHIFT 17
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/* 16 bits EventId */
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@ -249,6 +249,7 @@ struct GICv3State {
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uint32_t num_irq;
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uint32_t revision;
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bool lpi_enable;
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bool nmi_support;
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bool security_extn;
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bool force_8bit_prio;
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bool irq_reset_nonsecure;
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