mirror of https://github.com/xemu-project/xemu.git
target-sparc: store cpu super- and hypervisor flags in TB
Suggested-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
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1ceca92853
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c9b459aab8
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@ -670,6 +670,11 @@ static inline int cpu_supervisor_mode(CPUSPARCState *env1)
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{
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{
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return env1->pstate & PS_PRIV;
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return env1->pstate & PS_PRIV;
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}
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}
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#else
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static inline int cpu_supervisor_mode(CPUSPARCState *env1)
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{
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return env1->psrs;
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}
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#endif
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#endif
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static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch)
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static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch)
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@ -736,6 +741,8 @@ trap_state* cpu_tsptr(CPUSPARCState* env);
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#define TB_FLAG_MMU_MASK 7
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#define TB_FLAG_MMU_MASK 7
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#define TB_FLAG_FPU_ENABLED (1 << 4)
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#define TB_FLAG_FPU_ENABLED (1 << 4)
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#define TB_FLAG_AM_ENABLED (1 << 5)
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#define TB_FLAG_AM_ENABLED (1 << 5)
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#define TB_FLAG_SUPER (1 << 6)
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#define TB_FLAG_HYPER (1 << 7)
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#define TB_FLAG_ASI_SHIFT 24
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#define TB_FLAG_ASI_SHIFT 24
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static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
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static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
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@ -745,7 +752,17 @@ static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
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*pc = env->pc;
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*pc = env->pc;
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*cs_base = env->npc;
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*cs_base = env->npc;
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flags = cpu_mmu_index(env, false);
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flags = cpu_mmu_index(env, false);
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#ifndef CONFIG_USER_ONLY
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if (cpu_supervisor_mode(env)) {
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flags |= TB_FLAG_SUPER;
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}
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#endif
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#ifdef TARGET_SPARC64
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#ifdef TARGET_SPARC64
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#ifndef CONFIG_USER_ONLY
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if (cpu_hypervisor_mode(env)) {
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flags |= TB_FLAG_HYPER;
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}
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#endif
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if (env->pstate & PS_AM) {
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if (env->pstate & PS_AM) {
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flags |= TB_FLAG_AM_ENABLED;
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flags |= TB_FLAG_AM_ENABLED;
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}
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}
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@ -72,9 +72,16 @@ typedef struct DisasContext {
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target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */
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target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */
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int is_br;
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int is_br;
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int mem_idx;
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int mem_idx;
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int fpu_enabled;
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bool fpu_enabled;
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int address_mask_32bit;
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bool address_mask_32bit;
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int singlestep;
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bool singlestep;
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#ifndef CONFIG_USER_ONLY
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bool supervisor;
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#ifdef TARGET_SPARC64
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bool hypervisor;
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#endif
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#endif
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uint32_t cc_op; /* current CC operation */
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uint32_t cc_op; /* current CC operation */
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struct TranslationBlock *tb;
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struct TranslationBlock *tb;
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sparc_def_t *def;
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sparc_def_t *def;
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@ -283,10 +290,11 @@ static void gen_move_Q(DisasContext *dc, unsigned int rd, unsigned int rs)
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#define hypervisor(dc) 0
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#define hypervisor(dc) 0
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#endif
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#endif
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#else
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#else
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#define supervisor(dc) (dc->mem_idx >= MMU_KERNEL_IDX)
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#ifdef TARGET_SPARC64
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#ifdef TARGET_SPARC64
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#define hypervisor(dc) (dc->mem_idx == MMU_HYPV_IDX)
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#define hypervisor(dc) (dc->hypervisor)
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#define supervisor(dc) (dc->supervisor | dc->hypervisor)
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#else
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#else
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#define supervisor(dc) (dc->supervisor)
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#endif
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#endif
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#endif
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#endif
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@ -5710,9 +5718,15 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
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dc->fpu_enabled = tb_fpu_enabled(tb->flags);
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dc->fpu_enabled = tb_fpu_enabled(tb->flags);
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dc->address_mask_32bit = tb_am_enabled(tb->flags);
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dc->address_mask_32bit = tb_am_enabled(tb->flags);
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dc->singlestep = (cs->singlestep_enabled || singlestep);
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dc->singlestep = (cs->singlestep_enabled || singlestep);
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#ifndef CONFIG_USER_ONLY
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dc->supervisor = (tb->flags & TB_FLAG_SUPER) != 0;
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#endif
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#ifdef TARGET_SPARC64
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#ifdef TARGET_SPARC64
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dc->fprs_dirty = 0;
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dc->fprs_dirty = 0;
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dc->asi = (tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff;
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dc->asi = (tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff;
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#ifndef CONFIG_USER_ONLY
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dc->hypervisor = (tb->flags & TB_FLAG_HYPER) != 0;
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#endif
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#endif
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#endif
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num_insns = 0;
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num_insns = 0;
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