ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target/sparc: Move FSQRTq to decodetree 

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-10 15:07:48 -07:00
parent 8aa418b3ef
commit c995216bab
2 changed files with 23 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/sparc/insns.decode
View File

@ -247,6 +247,7 @@ FABSs 10 ..... 110100 00000 0 0000 1001 ..... @r_r2
FABSd 10 ..... 110100 00000 0 0000 1010 ..... @r_r2 FABSd 10 ..... 110100 00000 0 0000 1010 ..... @r_r2
FSQRTs 10 ..... 110100 00000 0 0010 1001 ..... @r_r2 FSQRTs 10 ..... 110100 00000 0 0010 1001 ..... @r_r2
FSQRTd 10 ..... 110100 00000 0 0010 1010 ..... @r_r2 FSQRTd 10 ..... 110100 00000 0 0010 1010 ..... @r_r2
FSQRTq 10 ..... 110100 00000 0 0010 1011 ..... @r_r2
FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2 FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2
FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2 FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2
FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2 FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2

38
target/sparc/translate.c
View File

@ -1686,18 +1686,6 @@ static void gen_fop_DDD(DisasContext *dc, int rd, int rs1, int rs2,
gen_store_fpr_D(dc, rd, dst); gen_store_fpr_D(dc, rd, dst);
} }
static void gen_fop_QQ(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_ptr))
{
gen_op_load_fpr_QT1(QFPREG(rs));
gen(tcg_env);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
gen_op_store_QT0_fpr(QFPREG(rd));
gen_update_fprs_dirty(dc, QFPREG(rd));
}
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
static void gen_ne_fop_QQ(DisasContext *dc, int rd, int rs, static void gen_ne_fop_QQ(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_ptr)) void (*gen)(TCGv_ptr))
@ -4845,6 +4833,27 @@ TRANS(FSQRTd, ALL, do_env_dd, a, gen_helper_fsqrtd)
TRANS(FxTOd, 64, do_env_dd, a, gen_helper_fxtod) TRANS(FxTOd, 64, do_env_dd, a, gen_helper_fxtod)
TRANS(FdTOx, 64, do_env_dd, a, gen_helper_fdtox) TRANS(FdTOx, 64, do_env_dd, a, gen_helper_fdtox)
static bool do_env_qq(DisasContext *dc, arg_r_r *a,
void (*func)(TCGv_env))
{
if (gen_trap_ifnofpu(dc)) {
return true;
}
if (gen_trap_float128(dc)) {
return true;
}
gen_op_clear_ieee_excp_and_FTT();
gen_op_load_fpr_QT1(QFPREG(a->rs));
func(tcg_env);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
gen_op_store_QT0_fpr(QFPREG(a->rd));
gen_update_fprs_dirty(dc, QFPREG(a->rd));
return advance_pc(dc);
}
TRANS(FSQRTq, ALL, do_env_qq, a, gen_helper_fsqrtq)
static bool do_fff(DisasContext *dc, arg_r_r_r *a, static bool do_fff(DisasContext *dc, arg_r_r_r *a,
void (*func)(TCGv_i32, TCGv_i32, TCGv_i32)) void (*func)(TCGv_i32, TCGv_i32, TCGv_i32))
{ {
@ -4990,11 +4999,8 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x2a: /* fsqrtd */ case 0x2a: /* fsqrtd */
case 0x82: /* V9 fdtox */ case 0x82: /* V9 fdtox */
case 0x88: /* V9 fxtod */ case 0x88: /* V9 fxtod */
g_assert_not_reached(); /* in decodetree */
case 0x2b: /* fsqrtq */ case 0x2b: /* fsqrtq */
CHECK_FPU_FEATURE(dc, FLOAT128); g_assert_not_reached(); /* in decodetree */
gen_fop_QQ(dc, rd, rs2, gen_helper_fsqrtq);
break;
case 0x41: /* fadds */ case 0x41: /* fadds */
gen_fop_FFF(dc, rd, rs1, rs2, gen_helper_fadds); gen_fop_FFF(dc, rd, rs1, rs2, gen_helper_fadds);
break; break;