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target-mips: Use CPU_LOG_INT for logging related to interrupts 

There are now no unconditional uses of qemu_log in the subdirectory.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
This commit is contained in:
Richard Henderson 2015-08-03 11:49:12 -07:00 committed by Leon Alrae
parent 58d479786b
commit c85570163b
2 changed files with 13 additions and 20 deletions
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22
target-mips/helper.c
View File

@ -127,10 +127,6 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
/* effective address (modified for KVM T&E kernel segments) */ /* effective address (modified for KVM T&E kernel segments) */
target_ulong address = real_address; target_ulong address = real_address;
#if 0
qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
#endif
#define USEG_LIMIT 0x7FFFFFFFUL #define USEG_LIMIT 0x7FFFFFFFUL
#define KSEG0_BASE 0x80000000UL #define KSEG0_BASE 0x80000000UL
#define KSEG1_BASE 0xA0000000UL #define KSEG1_BASE 0xA0000000UL
@ -227,11 +223,6 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
ret = TLBRET_BADADDR; ret = TLBRET_BADADDR;
} }
} }
#if 0
qemu_log(TARGET_FMT_lx " %d %d => %" HWADDR_PRIx " %d (%d)\n",
address, rw, access_type, *physical, *prot, ret);
#endif
return ret; return ret;
} }
#endif #endif
@ -487,14 +478,16 @@ void mips_cpu_do_interrupt(CPUState *cs)
int cause = -1; int cause = -1;
const char *name; const char *name;
if (qemu_log_enabled() && cs->exception_index != EXCP_EXT_INTERRUPT) { if (qemu_loglevel_mask(CPU_LOG_INT)
&& cs->exception_index != EXCP_EXT_INTERRUPT) {
if (cs->exception_index < 0 || cs->exception_index > EXCP_LAST) { if (cs->exception_index < 0 || cs->exception_index > EXCP_LAST) {
name = "unknown"; name = "unknown";
} else { } else {
name = excp_names[cs->exception_index]; name = excp_names[cs->exception_index];
} }
qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx
" %s exception\n",
__func__, env->active_tc.PC, env->CP0_EPC, name); __func__, env->active_tc.PC, env->CP0_EPC, name);
} }
if (cs->exception_index == EXCP_EXT_INTERRUPT && if (cs->exception_index == EXCP_EXT_INTERRUPT &&
@ -747,11 +740,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC); env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
break; break;
default: default:
qemu_log("Invalid MIPS exception %d. Exiting\n", cs->exception_index); abort();
printf("Invalid MIPS exception %d. Exiting\n", cs->exception_index);
exit(1);
} }
if (qemu_log_enabled() && cs->exception_index != EXCP_EXT_INTERRUPT) { if (qemu_loglevel_mask(CPU_LOG_INT)
&& cs->exception_index != EXCP_EXT_INTERRUPT) {
qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
" S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n", " S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n",
__func__, env->active_tc.PC, env->CP0_EPC, cause, __func__, env->active_tc.PC, env->CP0_EPC, cause,

3
target-mips/op_helper.c
View File

@ -38,7 +38,8 @@ static inline void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
CPUState *cs = CPU(mips_env_get_cpu(env)); CPUState *cs = CPU(mips_env_get_cpu(env));
if (exception < EXCP_SC) { if (exception < EXCP_SC) {
qemu_log("%s: %d %d\n", __func__, exception, error_code); qemu_log_mask(CPU_LOG_INT, "%s: %d %d\n",
__func__, exception, error_code);
} }
cs->exception_index = exception; cs->exception_index = exception;
env->error_code = error_code; env->error_code = error_code;