mirror of https://github.com/xemu-project/xemu.git
target/arm: Split s2walk_secure from ipa_secure in get_phys_addr
The starting security state comes with the translation regime, not the current state of arm_is_secure_below_el3(). Create a new local variable, s2walk_secure, which does not need to be written back to result->attrs.secure -- we compute that value later, after the S2 walk is complete. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20221001162318.153420-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -2298,7 +2298,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
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hwaddr ipa;
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int s1_prot;
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int ret;
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bool ipa_secure;
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bool ipa_secure, s2walk_secure;
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ARMCacheAttrs cacheattrs1;
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ARMMMUIdx s2_mmu_idx;
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bool is_el0;
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@ -2313,17 +2313,17 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
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ipa = result->phys;
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ipa_secure = result->attrs.secure;
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if (arm_is_secure_below_el3(env)) {
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if (ipa_secure) {
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result->attrs.secure = !(env->cp15.vstcr_el2 & VSTCR_SW);
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} else {
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result->attrs.secure = !(env->cp15.vtcr_el2 & VTCR_NSW);
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}
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if (is_secure) {
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/* Select TCR based on the NS bit from the S1 walk. */
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s2walk_secure = !(ipa_secure
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? env->cp15.vstcr_el2 & VSTCR_SW
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: env->cp15.vtcr_el2 & VTCR_NSW);
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} else {
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assert(!ipa_secure);
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s2walk_secure = false;
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}
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s2_mmu_idx = (result->attrs.secure
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s2_mmu_idx = (s2walk_secure
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? ARMMMUIdx_Stage2_S : ARMMMUIdx_Stage2);
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is_el0 = mmu_idx == ARMMMUIdx_E10_0 || mmu_idx == ARMMMUIdx_SE10_0;
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@ -2366,7 +2366,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
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result->cacheattrs);
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/* Check if IPA translates to secure or non-secure PA space. */
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if (arm_is_secure_below_el3(env)) {
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if (is_secure) {
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if (ipa_secure) {
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result->attrs.secure =
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!(env->cp15.vstcr_el2 & (VSTCR_SA | VSTCR_SW));
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